be used with fast-isel.

llvm-svn: 56268

function with appropriate parameters. This allows us to support blocks on PPC.

llvm-svn: 56267

llvm-svn: 56266

llvm-svn: 56265

llvm-svn: 56262

llvm-svn: 56261

  if we know that 'len != 0' and know that 'i == 0' then we know that
  'i < len' must evaluate to true and cannot evaluate to false

llvm-svn: 56260

llvm-svn: 56259

When converting a CopyFromReg to a copy instruction, use the register class of its uses to determine the right destination register class of the copy. This is important for targets where a physical register may belong to multiple register classes.

llvm-svn: 56258

 ^(expression) or ^(int arg1, float arg2)(expression)
...is no longer supported. 
All block literals now require a compound statement.

llvm-svn: 56257

llvm-svn: 56256

llvm-svn: 56255

Sema::CheckReturnStackAddr(): Make sure we skip over implicit casts.
Added some more test cases...

llvm-svn: 56254

ConstantPoolSDNode, using the target's preferred alignment for the
constant type.

In LegalizeDAG, when performing loads from the constant pool, the
ConstantPoolSDNode's alignment is used in the calls to getLoad and
getExtLoad.

This change prevents SelectionDAG::getLoad/getExtLoad from incorrectly
choosing the ABI alignment for constant pool loads when Alignment == 0.
The incorrect alignment is only a performance issue when ABI alignment
does not equal preferred alignment (i.e., on x86 it was generating
MOVUPS instead of MOVAPS for v4f32 constant loads when the default ABI
alignment for 128bit vectors is forced to 1 byte.)

Patch by Paul Redmond!

llvm-svn: 56253

Apologies for the thrashing.

llvm-svn: 56251

llvm-svn: 56250

- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol

These changes pave the way to allowing SymbolSDNodes with non-external linkage.

llvm-svn: 56249

MachineConstantPool::getConstantPoolIndex actually expects
a log2-encoded alignment.

llvm-svn: 56248

of r56230, r56232, and r56246.

llvm-svn: 56247

 - Recognize expressions like "x > -1 ? x : 0" as min/max and turn them
   into expressions like "x < 0 ? 0 : x", which is easily recognizable
   as a min/max operation.
 - Refrain from folding expression like "y/2 < 1" to "y < 2" when the
   comparison is being used as part of a min or max idiom, like
   "y/2 < 1 ? 1 : y/2". In that case, the division has another use, so
   folding doesn't eliminate it, and obfuscates the min/max, making it
   harder to recognize as a min/max operation.

These benefit ScalarEvolution, CodeGen, and anything else that wants to
recognize integer min and max.

llvm-svn: 56246

motivated because it became clear that the number of subclasses of ProgramPoint
would expand and we ran out of bits to represent a pointer variant. As a plus of
this change, BlockEdge program points can now be represented explicitly without
using a cache of CFGBlock* pairs in CFG.

llvm-svn: 56245

llvm-svn: 56244

llvm-svn: 56243

llvm-svn: 56242

"declare" statement.

llvm-svn: 56241

llvm-svn: 56240

are not enabled. Instead just omit the tail call flag when calls are
created.

llvm-svn: 56235

SCEV-whitespace changes.

llvm-svn: 56234

bitcode reader/writer as follows:

- add and use new bitcode FUNC_CODE_INST_VSELECT to handle the llvm
select opcode using either i1 or [N x i1] as the selector.
- retain old BITCODE FUNC_CODE_INST_SELECT in the bitcode reader to
handle select on i1 for backwards compatibility with existing bitcode
files.
- re-enable the vector-select.ll test program.

Also, rename the recently added bitcode opcode FUNC_CODE_INST_VCMP to
FUNC_CODE_INST_CMP2 and make the bitcode writer use it to handle
fcmp/icmp on scalars or vectors. In the bitcode writer, use
FUNC_CODE_INST_CMP for vfcmp/vicmp only. In the bitcode reader, have
FUNC_CODE_INST_CMP handle icmp/fcmp returning bool, for backwards
compatibility with existing bitcode files.

Patch by Preston Gurd!

llvm-svn: 56233

an if statement that guards a loop, to allow indvars to avoid smax
operations in more situations.

llvm-svn: 56232

Live intervals for live-in registers should begin at the beginning of a basic block, not at the first
instruction.  Also, their valno's should have an unknown def.  This has no effect currently, but was
causing issues when StrongPHIElimination was enabled.

llvm-svn: 56231

cases.  See the comment above OptimizeSMax for the full story, and
the testcase for an example. This cancels out a pessimization
commonly attributed to indvars, and will allow us to lift some of
the artificial throttles in indvars, rather than add new ones.

llvm-svn: 56230

This can be used by other stand alone tools, such as 'opt'.

llvm-svn: 56229

http://llvm.org/bugs/show_bug.cgi?id=2751

Abicall was enabled even when static code model was provided 
in the command line.
The correct behavior is to disable abicall when static is
specified.

llvm-svn: 56228

libcalls, as in this testcase on ARM.

llvm-svn: 56226

llvm-svn: 56225

llvm-svn: 56222

x86_ssecallcc, function notes, and some whitespace adjustments.

llvm-svn: 56221

block specified by the InstList. Patch by Stefanus Du Toit.

llvm-svn: 56200

Correctly update kill infos after extending a live range and merge 2 val#'s; fix 56165 - do not mark val# copy field if the copy does not define the val#.

llvm-svn: 56199