llvm-svn: 114508

the predicate to discover the number of sign bits.  Enhance X86's target lowering to provide
a useful response to this query.

llvm-svn: 114473

llvm-svn: 114463

(sbbl x, x) sets the registers to 0 or ~0.  Combined with two's complement arithmetic, we can fold
the intermediate AND and the ADD into a single SUB.

This fixes <rdar://problem/8449754>.

llvm-svn: 114460

llvm-svn: 114453

llvm-svn: 114410

"getFixedStack" on the MachinePointerInfo class.  While
this isn't the problem I'm setting out to solve, it is the
right way to eliminate PseudoSourceValue, so lets go with it.

llvm-svn: 114406

of the getLoad methods.  This fixes at least one bug where an incorrect
svoffset is passed in (a potential combiner-aa miscompile).

llvm-svn: 114404

instead of srcvalue/offset pairs.  This corrects SV info for mem 
operations whose size is > 32-bits.

llvm-svn: 114401

llvm-svn: 114391

llvm-svn: 113766

llvm-svn: 113378

nodes to emit shuffles and don't do isel mask matching anymore.
- Add the selection of the remaining shuffle opcode (movddup)
- Introduce two new functions to "recognize" where we may get
potential folds and add several comments to them explaining why
they are not yet in the desidered shape.
- Add more patterns to fallback the case where we select
a specific shuffle opcode as if it could fold a load, but it
can't, so remap to a valid instruction.
- Add a couple of FIXMEs to address in the following days once
there's a good solution to the current folding problem.

llvm-svn: 113369

Factor out some x86 vector shuffle rewriting and add comments about the direction the shuffle lowering is heading to

llvm-svn: 113286

llvm-svn: 113267

llvm-svn: 113261

decouple MMX check from regular splat checks. Some refactoring is coming, and MMX should be left alone to be easily removed after moving to intrinsics

llvm-svn: 113247

llvm-svn: 113242

llvm-svn: 113239

llvm-svn: 113059

llvm-svn: 113058

llvm-svn: 113056

llvm-svn: 113055

llvm-svn: 113050

llvm-svn: 113048

llvm-svn: 113047

llvm-svn: 113045

llvm-svn: 113044

llvm-svn: 113043

llvm-svn: 113035

llvm-svn: 113034

checking each standalone condition and decide whether emit target
specific nodes or remove the condition if it's already matched before.

llvm-svn: 113031

"Use target specific nodes instead of relying in unpckl and
unpckh pattern fragments during isel time. Also place a
depth limit in getShuffleScalarElt.

llvm-svn: 113020

llvm-svn: 113008

functional changes

llvm-svn: 113007

llvm-svn: 113006

some infinite loop and select failures.
 - Apologies for eager reverting, but its branch day.

llvm-svn: 113000

infinite loop and select failures.

llvm-svn: 112999

mask pattern fragment", which depends on r112934, which introduced some infinite
loop and select failures.

llvm-svn: 112998

llvm-svn: 112942