- Feb 22, 2008
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Evan Cheng authored
the definition of the operand also reaches its uses. llvm-svn: 47475
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Chris Lattner authored
instead of with mmx registers. This horribleness is apparently done by gcc to avoid having to insert emms in places that really should have it. This is the second half of rdar://5741668. llvm-svn: 47474
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Devang Patel authored
llvm-svn: 47473
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Devang Patel authored
llvm-svn: 47472
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Devang Patel authored
llvm-svn: 47471
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Chris Lattner authored
GCC apparently does this, and code depends on not having to do emms when this happens. This is x86-64 only so far, second half should handle x86-32. rdar://5741668 llvm-svn: 47470
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Evan Cheng authored
llvm-svn: 47468
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Dan Gohman authored
that a value is >= 32, check that all of the high bits are zero, not just one or more. llvm-svn: 47467
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Devang Patel authored
llvm-svn: 47461
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- Feb 21, 2008
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Devang Patel authored
llvm-svn: 47460
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Eli Friedman authored
new things. llvm-svn: 47458
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Chris Lattner authored
early clobbers if the clobber list contains a *register* not some thing like {memory}, {dirflag} etc. llvm-svn: 47457
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Chris Lattner authored
any, we force sdisel to do all regalloc for an asm. This leads to gross but correct codegen. This fixes the rest of PR2078. llvm-svn: 47454
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Bill Wendling authored
llvm-svn: 47453
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Bill Wendling authored
llvm-svn: 47452
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Evan Cheng authored
llvm-svn: 47448
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Dan Gohman authored
llvm-svn: 47437
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Andrew Lenharth authored
llvm-svn: 47435
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Nick Lewycky authored
llvm-svn: 47434
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Nick Lewycky authored
llvm-svn: 47433
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Chris Lattner authored
llvm-svn: 47431
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Andrew Lenharth authored
Atomic op support. If any gcc test uses __sync builtins, it might start failing on archs that haven't implemented them yet llvm-svn: 47430
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Chris Lattner authored
Eli Friedman. This implements CodeGen/Generic/2008-02-20-MatchingMem.ll. llvm-svn: 47428
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Chris Lattner authored
inline asms. Fix PR2078 by marking aliases of registers used when a register is marked used. This prevents EAX from being allocated when AX is listed in the clobber set for the asm. llvm-svn: 47426
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Devang Patel authored
llvm-svn: 47425
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Devang Patel authored
Now, we have very first multiple return value testcase! llvm-svn: 47424
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Evan Cheng authored
llvm-svn: 47416
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- Feb 20, 2008
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Devang Patel authored
llvm-svn: 47408
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Devang Patel authored
ret i32 1, i8 2 another step towards multiple return value support. llvm-svn: 47407
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Devang Patel authored
One small step towards multiple return value support. llvm-svn: 47406
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Dale Johannesen authored
llvm-svn: 47402
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Dale Johannesen authored
llvm-svn: 47401
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Evan Cheng authored
llvm-svn: 47400
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Bill Wendling authored
No need to go up more levels. A def of a register also sets its sub-registers (so if PhysRegInfo[SuperReg] is NULL, it means SuperReg's super registers are not previously defined). llvm-svn: 47399
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Anton Korobeynikov authored
llvm-svn: 47397
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Devang Patel authored
llvm-svn: 47396
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Bill Wendling authored
llvm-svn: 47395
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Devang Patel authored
llvm-svn: 47394
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Devang Patel authored
llvm-svn: 47392
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Devang Patel authored
llvm-svn: 47391
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