Part of rdar://10493979 where it reduces by about .5% (10k)

llvm-svn: 151097

they'll be simple enough to simulate, and to reduce the chance we'll encounter
equal but different simple pointer constants.

This removes the symptoms from PR11352 but is not a full fix. A proper fix would
either require a guarantee that two constant objects we simulate are folded
when equal, or a different way of handling equal pointers (ie., trying a
constantexpr icmp on them to see whether we know they're equal or non-equal or
unsure).

llvm-svn: 151093

llvm-svn: 151083

llvm-svn: 151079

llvm-svn: 151056

This transformation is not safe in some pathological cases (signed icmp of pointers should be an
extremely rare thing, but it's valid IR!). Add an explanatory comment.

Kudos to Duncan for pointing out this edge case (and not giving up explaining it until I finally got it).

llvm-svn: 151055

and into StringRef.cpp, which is where the other StringRef stuff is.

llvm-svn: 151054

llvm-svn: 151052

the normalize routine, especially the empty while loops.

llvm-svn: 151050

using a DenseMap and Talin's new GeneralHash, avoiding the need for a
temporary std::vector on every lookup.

Patch by Meador Inge!

llvm-svn: 151049

days. No functionality changed.

llvm-svn: 151048

They're private static methods but we can just make them static
functions in the implementation. It makes the implementations a touch
more wordy, but takes another chunk out of the header file.

Also, take the opportunity to switch the names to the new coding
conventions.

No functionality changed here.

llvm-svn: 151047

Somehow, I even missed the ones I wrote just the other day...

Thanks to Matt for the code review.

llvm-svn: 151045

Passes after RegAlloc should be able to rely on MRI->getNumVirtRegs() == 0.
This makes sharing code for pre/postRA passes more robust.
Now, to check if a pass is running before the RA pipeline begins, use MRI->isSSA().
To check if a pass is running after the RA pipeline ends, use !MRI->getNumVirtRegs().

PEI resets virtual regs when it's done scavenging.

PTX will either have to provide its own PEI pass or assign physregs.

llvm-svn: 151032

llvm-svn: 151031

llvm-svn: 151026

llvm-svn: 151025

construction. Simplify its interface, implementation, and users
accordingly as there is no longer an 'uninitialized' state to check for.
Also, fixes a bug lurking in the interface as there was one method that
didn't correctly check for initialization.

llvm-svn: 151024

know where users will be added. Because of this, it cannot use
Builder.GetInsertPoint at all.

This patch
* removes the FIXME about adding the assert.
* adds a comment explaining hy we don't have one.
* removes a broken logic that only works for some callers and is not needed
  since r150884.
* adds an assert to caller that would have caught the bug fixed by r150884.

llvm-svn: 151015

llvm-svn: 151006

llvm-svn: 151003

ecx = mov eax
al  = mov ch
The second copy is not a nop because the sub-indices of ecx,ch is not the
same of that of eax/al.

Re-enabled machine-cp.
PR11940

llvm-svn: 151002

llvm-svn: 150998

InstCombine: Removing the base from the address calculation is only safe when the GEPs are inbounds.

llvm-svn: 150978

derived from anything.

llvm-svn: 150975

too.

llvm-svn: 150974

llvm-svn: 150973

InstCombine: When comparing two GEPs that were derived from the same base pointer but use different types, expand the offset calculation and to the compare on the offset if profitable.

This came up in SmallVector code.

llvm-svn: 150962

- Ignore pointer casts.
- Also expand GEPs that aren't constantexprs when they have one use or only constant indices.

- We now compile "&foo[i] - &foo[j]" into "i - j".

llvm-svn: 150961

llvm-svn: 150957

Teach TargetSelectionDAG about lengthening loads for vector types and set v4i8 as legal. Allow FP_TO_UINT for v4i16 from v4i32.

llvm-svn: 150956

flow changes have already hidden the bug. rdar://10893812

llvm-svn: 150949

llvm-svn: 150947

implementing PR12013.  We now compile the testcase to:

__Z4testv:                              ## @_Z4testv
## BB#0:                                ## %_ZN4llvm15SmallVectorImplIiE9push_backERKi.exit
	pushq	%rbx
	subq	$64, %rsp
	leaq	32(%rsp), %rbx
	movq	%rbx, (%rsp)
	leaq	64(%rsp), %rax
	movq	%rax, 16(%rsp)
	movl	$1, 32(%rsp)
	leaq	36(%rsp), %rax
	movq	%rax, 8(%rsp)
	leaq	(%rsp), %rdi
	callq	__Z1gRN4llvm11SmallVectorIiLj8EEE
	movq	(%rsp), %rdi
	cmpq	%rbx, %rdi
	je	LBB0_2
## BB#1:
	callq	_free
LBB0_2:                                 ## %_ZN4llvm11SmallVectorIiLj8EED1Ev.exit
	addq	$64, %rsp
	popq	%rbx
	ret

instead of:

__Z4testv:                              ## @_Z4testv
## BB#0:
	pushq	%rbx
	subq	$64, %rsp
	xorl	%eax, %eax
	leaq	(%rsp), %rbx
	addq	$32, %rbx
	movq	%rbx, (%rsp)
	movq	%rbx, 8(%rsp)
	leaq	64(%rsp), %rcx
	movq	%rcx, 16(%rsp)
	je	LBB0_2
## BB#1:
	movl	$1, 32(%rsp)
	movq	%rbx, %rax
LBB0_2:                                 ## %_ZN4llvm15SmallVectorImplIiE9push_backERKi.exit
	addq	$4, %rax
	movq	%rax, 8(%rsp)
	leaq	(%rsp), %rdi
	callq	__Z1gRN4llvm11SmallVectorIiLj8EEE
	movq	(%rsp), %rdi
	cmpq	%rbx, %rdi
	je	LBB0_4
## BB#3:
	callq	_free
LBB0_4:                                 ## %_ZN4llvm11SmallVectorIiLj8EED1Ev.exit
	addq	$64, %rsp
	popq	%rbx
	ret

This doesn't shrink clang noticably though.

llvm-svn: 150944

functionality changed. This is in preparation for some refactoring of
how this class behaves.

llvm-svn: 150941

the information that they pass around between them. No functionality change!

llvm-svn: 150939

llvm-svn: 150921

llvm-svn: 150918

llvm-svn: 150917

Remove some unneeded includes and fix ordering in X86ISelLowering.cpp. Remove unneeded 'using namespace'.

llvm-svn: 150916