llvm-svn: 76909

testsuite, due to exception handling not working
correctly.  Maybe because the libgcc unwinder is
miscompiled - not sure, and I won't have time to
look into it before leaving on holiday.  Note that
miscompilations of libgcc are not picked up by the
nightly testers, because they dynamically link with
libgcc, so pick up the system version rather than
the version built as part of llvm-gcc.  This is a
nasty flaw in the nightly testers.  (On the other
hand the Ada testsuite links with the just built
libgcc).

llvm-svn: 76895

Also fixed up code to fully use the SoImm field for ADR on ARM mode.

llvm-svn: 76890

Since we have moved unified assembly, switch to ADR instruction instead of a the difficult-to-read .set + add syntax to materialize pc-relative address.

Turns out this also fixed a poor code selection on Thumb1. I have no idea why we were using a mov + add to do the same thing as ADR before.

llvm-svn: 76889

Fix frame index elimination to correctly handle thumb-2 addressing modes that don't allow negative offsets. During frame elimination convert *i12 opcode to a *i8 when necessary due to a negative offset.

llvm-svn: 76883

llvm-svn: 76872

testcases to make sure it's being generated.

llvm-svn: 76843

llvm-svn: 76842

a better solution for it in the future.

llvm-svn: 76818

llvm-svn: 76817

llvm-svn: 76806

llvm-svn: 76803

simplification.
 - NFC

llvm-svn: 76789

llvm-svn: 76786

llvm-svn: 76778

llvm-svn: 76762

llvm-svn: 76750

be placed in the standard data / bss sections.

llvm-svn: 76735

on linux platforms.  The binutils assembler does not
recognize the "s" flag, see for example
http://sourceware.org/binutils/docs/as/Section.html 

llvm-svn: 76733

llvm-svn: 76729

Add R12 to the list of registers clobbered by 16-bit Thumb calls as a pre-caution. r12 could be live once we have mixed 32-bit and 16-bit instructions.

llvm-svn: 76728

llvm-svn: 76727

llvm-svn: 76725

llvm-svn: 76713

assembler / disassembler.

llvm-svn: 76712

llvm-svn: 76711

only caller.

llvm-svn: 76710

updating a mips testcase to expect it.

llvm-svn: 76707

llvm-svn: 76706

a new getSectionForMergableConstant hook.  This removes one dependence
of TAI on Type, and provides the hook with enough info to make the 
right decision based on whether the global has relocations etc.

llvm-svn: 76705

Let each target determines whether a machine instruction is dead. If true, that allows late codeine passes to delete it.

This is considered a workaround. The problem is some targets are not modeling side effects correctly. PPC is apparently one of those. This patch allows ppc llvm-gcc to bootstrap on Darwin. Once we find out which instruction definitions are wrong, we can remove the PPCInstrInfo workaround.

llvm-svn: 76703

llvm-svn: 76702

Constant::getRelocationInfo(), which has a much simpler
to use API.  It still should not be part of libvmcore, but
is better than it was.  Also teach it to be smart about 
hidden visibility.

llvm-svn: 76700

negative on an individual bases rather than basing on whether it's in thumb
mode.

llvm-svn: 76698

llvm-svn: 76693

llvm-svn: 76689

virtual.  Just inline it into its two current call sites in preparation
for simplifying the code.

llvm-svn: 76686

llvm-svn: 76683

llvm-svn: 76682

llvm-svn: 76679