a register to 0. This fixes PR4814.

llvm-svn: 80445

  encodings.
- Make some of the values emitted by the FDEs dependent upon the pointer
  size. This is in line with how GCC does things. And it has the benefit of
  working for Darwin in 64-bit mode now.

llvm-svn: 80428

Some other minor win64 fixes as well.

Patch by Michael Beck!

llvm-svn: 80370

llvm-svn: 80271

llvm-svn: 80269

llvm-svn: 80268

 - Note, this is a gigantic hack, with the sole purpose of unblocking further
   work on the assembler (its also possible to test the mathcer more completely
   now).

 - Despite being a hack, its actually good enough to work over all of 403.gcc
   (although some encodings are probably incorrect). This is a testament to the 
   beauty of X86's MachineInstr, no doubt! ;)

llvm-svn: 80234

llvm-svn: 80232

llvm-svn: 80186

moves. This avoids the need to promote the operands (or implicitly
extend them, a partial register update condition), and can reduce
i8 register pressure. This substantially speeds up code such as
write_hex in lib/Support/raw_ostream.cpp.

subclass-coalesce.ll is too trivial and no longer tests what it was
originally intended to test.

llvm-svn: 80184

leads to partial-register definitions. To help avoid redundant
zero-extensions, also teach the h-register matching patterns that
use movzbl to match anyext as well as zext.

llvm-svn: 80099

llvm-svn: 80012

llvm-svn: 79961

llvm-svn: 79873

llvm-svn: 79853

llvm-svn: 79834

MachineInstr and MachineOperand.  This required eliminating a
bunch of stuff that was using DOUT, I hope that bill doesn't
mind me stealing his fun. ;-)

llvm-svn: 79813

llvm-svn: 79780

llvm-svn: 79777

llvm-svn: 79773

llvm-svn: 79763

llvm-svn: 79742

llvm-svn: 79634

Intel documentation.

llvm-svn: 79554

over absolute addressing even in non-PIC mode (unless the address
has an index or something else incompatible), because it has a
smaller encoding.

llvm-svn: 79553

llvm-svn: 79495

llvm-svn: 79494

llvm-svn: 79484

llvm-svn: 79443

a smaller encoding. These kinds of patterns are very frequent in
sqlite3, for example.

llvm-svn: 79439

talk to the MCStreamer directly instead.

llvm-svn: 79405

Add patterns and instruction encoding information.
Add custom lowering to deal with hardwired return register of
uncertain type (xmm0).

llvm-svn: 79377

llvm-svn: 79321

send instructions like:

NEW: 	movl	"L___stack_chk_guard$non_lazy_ptr" - "L1$pb"(%esi), %eax
OLD: 	movl	L___stack_chk_guard$non_lazy_ptr-"L1$pb"(%esi), %eax

through the streamer.  Several fixmes.

llvm-svn: 79317

returns a log2 value.

llvm-svn: 79293

just remove the argument and replace it with 1.

llvm-svn: 79246

or some other situation where no xmm registers need to be saved.

llvm-svn: 79207

llvm-svn: 79187

llvm-svn: 79175

can asmprint:

NEW: 	movl	"L___stack_chk_guard$non_lazy_ptr", %eax
OLD: 	movl	L___stack_chk_guard$non_lazy_ptr, %eax

where 'new' is coming out of the MCInst version of the printer.

llvm-svn: 79170