There are two conflicting strategies in play:

- Under high register pressure, we want to assign large live ranges
  first. Smaller live ranges are easier to place afterwards.

- Live range splitting is guided by interference, so splitting should be
  deferred until interference is as realistic as possible.

With the recent changes to the live range stages, and with compact
regions enabled, it is less traumatic to split a live range too early.
If some of the split products were too big, they can often be split
again.

By reversing the RS_Split order, we get this queue order:

1. Normal live ranges, large to small.
2. RS_Split live ranges, large to small.

The large-to-small order improves RAGreedy's puzzle solving skills under
high register pressure. It may cause a bit more iterated splitting, but
we handle that better now.

With this change, -compact-regions is mostly an improvement on SPEC.

llvm-svn: 136388

This should be the only code necessary for DWARF EH prepare.

llvm-svn: 136387

llvm-svn: 136384

llvm-svn: 136381

llvm-svn: 136375

llvm-svn: 136369

llvm-svn: 136367

llvm-svn: 136366

Revert r136295.  It broke nightly testers because some parts of codegen weren't aware of the changes to operand ordering.  I hope to revive this sometime in the future, but it's not strictly necessary for now.

llvm-svn: 136362

The label does not have a '#' prefix. Add parsing and encoding tests.

llvm-svn: 136360

llvm-svn: 136358

identical.

llvm-svn: 136355

more graphs, like all graphs with 5 nodes or less.  With a 32 bit
unsigned type, the maximum is graphs with 6 nodes or less, but that
would take a while to test - 5 nodes or less already requires a few
seconds.

llvm-svn: 136354

iterates over SCC's.

llvm-svn: 136353

This computes every graph with 4 or fewer nodes, and checks that the SCC
class indeed returns exactly the simply connected components reachable
from the initial node.

llvm-svn: 136351

bitcasts in this test rather than getelementptr instructions;
llvm-gcc produces two bitcasts, clang produces one.

llvm-svn: 136349

llvm-svn: 136344

llvm-svn: 136341

The new EH is more simple in many respects. Mainly, we don't have to worry about
the "llvm.eh.exception" and "llvm.eh.selector" calls being in weird places.

llvm-svn: 136339

llvm-svn: 136338

of the empty key for U. This shouldn't really matter because the tombstone key
for the pair was still distinct from every other key, but it is odd. Patch by
Michael Ilseman!

llvm-svn: 136336

landingpad.

llvm-svn: 136329

LLVM*AsmPrinter.

GenLibDeps.pl fails to detect vtable references. As this is the only
referenced symbol from LLVM*Desc to LLVM*AsmPrinter on optimized
builds, the algorithm that creates the list of libraries to be linked
into tools doesn't know about the dependency and sometimes places the
libraries on the wrong order, yielding error messages like this:

../../lib/libLLVMARMDesc.a(ARMMCTargetDesc.cpp.o): In function
`llvm::ARMInstPrinter::ARMInstPrinter(llvm::MCAsmInfo const&)':
ARMMCTargetDesc.cpp:(.text._ZN4llvm14ARMInstPrinterC1ERKNS_9MCAsmInfoE
[llvm::ARMInstPrinter::ARMInstPrinter(llvm::MCAsmInfo
const&)]+0x2a): undefined reference to `vtable for
llvm::ARMInstPrinter'

llvm-svn: 136328

llvm-svn: 136327

llvm-svn: 136326

* InvokeInst: Get the landingpad instruction associated with this invoke.
* LandingPadInst: A method to reserve extra space for clauses.

llvm-svn: 136325

llvm-svn: 136324

using vextractf128. This will reduce the number of issued instruction
for several avx codes.

llvm-svn: 136323

them to match 256-bit scalar_to_vector+zext.

llvm-svn: 136322

Take advantage that the 128-bit vpxor zeros the higher part and use it.
This also fixes PR10491

llvm-svn: 136321

a convert pattern close to the instruction definition.

llvm-svn: 136320

llvm-svn: 136319

This takes the new 'resume' instruction and turns it into a direct jump to the
caller's landing pad code. The caller's landingpad instruction is merged with
the landingpad instructions of the callee. This is a bit rough and makes some
assumptions in how the code works. But it passes a simple test.

llvm-svn: 136313

UXTAB, UXTAB16, UXTAH, UXTB, UXTB16, and UXTH.

llvm-svn: 136312

If true and 'model' parameter is not an absolute path, a temp directory will be prepended.
Make it true by default to match current behaviour.

llvm-svn: 136310

Refactor and improve the encodings/decodings for addrmode3 loads, and make the writeback operand always the first.

llvm-svn: 136295

This can happen in cases where TableGen generated asm matcher cannot check
whether a register operand is in the right register class. e.g. mem operands.

rdar://8204588

llvm-svn: 136292

llvm-svn: 136289

llvm-svn: 136288

llvm-mc gives an "invalid operand" error for instructions that take an unsigned
immediate which have the high bit set such as:
    pblendw $0xc5, %xmm2, %xmm1
llvm-mc treats all x86 immediates as signed values and range checks them.
A small number of x86 instructions use the imm8 field as a set of bits.
This change only changes those instructions and where the high bit is not
ignored.  The others remain unchanged.

llvm-svn: 136287