Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index elimination more exactly for Thumb-2 to get better code gen.

llvm-svn: 76919

llvm-svn: 76909

Also fixed up code to fully use the SoImm field for ADR on ARM mode.

llvm-svn: 76890

Since we have moved unified assembly, switch to ADR instruction instead of a the difficult-to-read .set + add syntax to materialize pc-relative address.

Turns out this also fixed a poor code selection on Thumb1. I have no idea why we were using a mov + add to do the same thing as ADR before.

llvm-svn: 76889

Fix frame index elimination to correctly handle thumb-2 addressing modes that don't allow negative offsets. During frame elimination convert *i12 opcode to a *i8 when necessary due to a negative offset.

llvm-svn: 76883

llvm-svn: 76872

llvm-svn: 76806

llvm-svn: 76803

llvm-svn: 76762

llvm-svn: 76729

Add R12 to the list of registers clobbered by 16-bit Thumb calls as a pre-caution. r12 could be live once we have mixed 32-bit and 16-bit instructions.

llvm-svn: 76728

llvm-svn: 76727

llvm-svn: 76725

llvm-svn: 76711

llvm-svn: 76702

negative on an individual bases rather than basing on whether it's in thumb
mode.

llvm-svn: 76698

llvm-svn: 76693

llvm-svn: 76679

pool entry will require relocations against it.  I implemented this
conservatively for ARM, someone who is knowledgable about it should
see if this can be improved.

llvm-svn: 76678

llvm-svn: 76612

and call PrintGlobalVariable, allowing elimination and simplification
of various targets.

llvm-svn: 76604

llvm-svn: 76600

llvm-svn: 76520

llvm-svn: 76489

llvm-svn: 76456

llvm-svn: 76424

llvm-svn: 76401

llvm-svn: 76390

"private" symbols which the assember shouldn't strip, but which the linker may
remove after evaluation. This is mostly useful for Objective-C metadata.

This is plumbing, so we don't have a use of it yet. More to come, etc.

llvm-svn: 76385

llvm-svn: 76374

 - Shouldn't really be necessary, but currently .inc files get included into
   some main target headers.

llvm-svn: 76349

llvm-svn: 76344

the X86 Emitter.  This patch extends that to the rest of the targets that can
write to a MachineCodeEmitter: ARM, Alpha, and PPC.

llvm-svn: 76211

llvm-svn: 76155

Minor code duplication cleanup.

llvm-svn: 76124

Avoid remat'ing instructions whose def have sub-register indices for now. It's just really really hard to get all the cases right.

llvm-svn: 75900

variables.
 - Module initialization functions supplanted the need for these.

llvm-svn: 75886

 - No functionality change.

llvm-svn: 75859

 - No intended functionality change.

llvm-svn: 75848

 - No intended functionality change.

llvm-svn: 75843