[Sparc] Emit correct encoding for atomic instructions. Also, add support for parsing CAS instructions to test the CAS encoding. 

llvm-svn: 200963

llvm-svn: 200962

llvm-svn: 200961

llvm-svn: 200960

llvm-svn: 200890

Clang itself was not using this. The only way to access it was via llc.

llvm-svn: 200862

[Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly.

llvm-svn: 200617

llvm-svn: 200509

The SWAP instruction only exists in a 32-bit variant, but the 64-bit
atomic swap can be implemented in terms of CASX, like the other atomic
rmw primitives.

llvm-svn: 200453

This makes MCAsmInfo::getExprForFDESymbol() a virtual function and overrides it in SparcMCAsmInfo.

llvm-svn: 200376

Otherwise, assembler (gas) fails to assemble them with error message "operation
combines symbols in different segments". This is because MC computes
pc_rel entries with subtract expression between labels from different sections.

llvm-svn: 200373

[SparcV9] Use correct register class (I64RegClass) to hold the address of  _GLOBAL_OFFSET_TABLE_ in sparcv9.

llvm-svn: 200368

Oops. Don't do build tests on patches like that with --enable-targets=x86_64

llvm-svn: 200355

llvm-svn: 200349

llvm-svn: 200348

llvm-svn: 200345

Also emit the stubs that were generated for references to typeinfo
symbols.

llvm-svn: 200282

llvm-svn: 200141

With this the target streamers will be able to know the target features that
are in use.

llvm-svn: 200135

The popc instruction is defined in the SPARCv9 instruction set
architecture, but it was emulated on CPUs older than Niagara 2.

llvm-svn: 200131

Found by SingleSource/UnitTests/AtomicOps.c

llvm-svn: 200130

This has a few advantages:
* Only targets that use a MCTargetStreamer have to worry about it.
* There is never a MCTargetStreamer without a MCStreamer, so we can use a
  reference.
* A MCTargetStreamer can talk to the MCStreamer in its constructor.

llvm-svn: 200129

Sweep the codebase for common typos. Includes some changes to visible function
names that were misspelt.

llvm-svn: 200018

With this change, all supported tests in test/ExecutionEngine pass in sparcv9.

llvm-svn: 199977

These all use the compare-and-swap CASA/CASXA instructions.

llvm-svn: 199975

Add test cases to check parsing of v9 double registers and their aliased quad registers.

llvm-svn: 199974

code this looks correct, but could use review. The previous
was definitely not correct.

llvm-svn: 199940

llvm-svn: 199786

llvm-svn: 199781

Fixes PR#18521

llvm-svn: 199775

promotion code, Tablegen will now select FPExt for floating point promotions
(previously it had returned AExt, which is not valid for floating point types).

Any out-of-tree targets that were relying on AExt being returned for FP
promotions will need to update their code check for FPExt instead.

llvm-svn: 199252

This will allow it to be called from target independent parts of the main
streamer that don't know if there is a registered target streamer or not. This
in turn will allow targets to perform extra actions at specified points in the
interface: add extra flags for some labels, extra work during finalization, etc.

llvm-svn: 199174

Targets like SPARC and MIPS have delay slots and normally bundle the
delay slot instruction with the corresponding terminator.

Teach isBlockOnlyReachableByFallthrough to find any MBB operands on
bundled terminators so SPARC doesn't need to specialize this function.

llvm-svn: 199061

llvm-svn: 199033

llvm-svn: 199031

This is different from the argument passing convention which puts the
first float argument in %f1.

With this patch, all returned floats are treated as if the 'inreg' flag
were set. This means multiple float return values get packed in %f0,
%f1, %f2, ...

Note that when returning a struct in registers, clang will set the
'inreg' flag on the return value, so that behavior is unchanged. This
also happens when returning a float _Complex.

llvm-svn: 199028

llvm-svn: 199024

[Sparc] Bundle instruction with delay slow and its filler. Now, we can use -verify-machineinstrs with SPARC backend.

llvm-svn: 199014

[Sparc] Emit retl/ret instead of jmp instruction. It improves the readability of the assembly generated.

llvm-svn: 198910

[Sparc] Add support for parsing jmpl instruction and make indirect call and jmp instructions as aliases to jmpl.

llvm-svn: 198909