[Sparc] Emit correct encoding for atomic instructions. Also, add support for parsing CAS instructions to test the CAS encoding. 

llvm-svn: 200963

the << and >> bitwise operators.

rdar://15975725

llvm-svn: 200896

In Thumb1 mode, bl instruction might be selected for branches between
basic blocks in the function if the offset is greater than 2KB.
However, this might cause SEGV because the destination symbol
is not marked as thumb function and the execution mode will be reset
to ARM mode.

Since we are sure that these symbols are in the same data fragment, we
can simply resolve these local symbols, and don't emit any relocation
information for this bl instruction.

llvm-svn: 200842

llvm-svn: 200837

Patch implements %hi(sym1 - sym2) and %lo(sym1 - sym2) expressions for MIPS
by creating target expression class MipsMCExpr.

Patch by Sasa Stankovic.

Differential Revision: http://llvm-reviews.chandlerc.com/D2592

llvm-svn: 200783

llvm-svn: 200615

This is a minimal implementation which accepts only constants rather than
full expressions, but that should be perfectly sufficient for all known
users for now.

Patch from PaX Team <pageexec@freemail.hu>

llvm-svn: 200614

Something funny happened, this should've been part of r200606.

llvm-svn: 200607

Per the GAS documentation, .fill should permit pattern widths that
aren't a power of two. While I was in the neighborhood, I added some
sanity checking. This change was motivated by a use of this construct
in the Linux Kernel.

llvm-svn: 200606

To remove this one simply move the end of file logic from the asm printer to
the target mc streamer.

This removes the last call to hasRawTextSupport from lib/Target.

llvm-svn: 200590

This instruction is only available on Mips64 cores that implement the MSA ASE.

llvm-svn: 200543

Move address override handling in X86MCCodeEmitter to a place where it works for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode.

llvm-svn: 200516

These should end up (in ELF) as R_X86_64_32S relocs, not R_X86_64_32.
Kill the horrid and incomplete special case and FIXME in
EncodeInstruction() and set things up so it can infer the signedness
from the ImmType just like it can the size and whether it's PC-relative.

llvm-svn: 200495

llvm-svn: 200490

The .object_arch directive indicates an alternative architecture to be specified
in the object file.  The directive does *not* effect the enabled feature bits
for the object file generation.  This is particularly useful when the code
performs runtime detection and would like to indicate a lower architecture as
the requirements than the actual instructions used.

llvm-svn: 200451

.movsp is an ARM unwinding directive that indicates to the unwinder that a
register contains an offset from the current stack pointer.  If the offset is
unspecified, it defaults to zero.

llvm-svn: 200449

This enhances the ARMAsmParser to handle .tlsdescseq directives.  This is a
slightly special relocation.  We must be able to generate them, but not consume
them in assembly.  The relocation is meant to assist the linker in generating a
TLS descriptor sequence.  The ELF target streamer is enhanced to append
additional fixups into the current segment and that is used to emit the new
R_ARM_TLS_DESCSEQ relocations.

llvm-svn: 200448

Add support for tlsdesc relocations which are part of the ABI, marked as
experimental.  These relocations permit the linker to perform TLS reference
optimizations.

llvm-svn: 200447

This adds support for TLS CALL relocations.  TLS CALL relocations are used to
indicate to the linker to generate appropriate entries to resolve TLS references
via an appropriate function invocation (e.g. __tls_get_addr(PLT)).

In order to accomodate the linker relaxation of the TLS access model for the
references (GD/LD -> IE, IE -> LE), the relocation addend must be incomplete.
This requires that the partial inplace value is also incomplete (i.e. 0).  We
simply avoid the offset value calculation at the time of the fixup adjustment in
the ARM assembler backend.

llvm-svn: 200446

The linux kernel makes uses of a GAS `feature' which substitutes nothing
for macro arguments which aren't specified.

Proper support for these kind of macro arguments necessitated a cleanup of
differences between `GAS' and `Darwin' dialect macro processing.

Differential Revision: http://llvm-reviews.chandlerc.com/D2634

llvm-svn: 200409

This instruction is only available on Mips64 cores
that implement the MSA ASE.

llvm-svn: 200400

These instructions are only available on Mips64 cores
that implement the MSA ASE.

llvm-svn: 200398

After all hard work to implement the EHABI and with the test-suite
passing, it's time to turn it on by default and allow users to
disable it as a work-around while we fix the eventual bugs that show
up.

This commit also remove the -arm-enable-ehabi-descriptors, since we
want the tables to be printed every time the EHABI is turned on
for non-Darwin ARM targets.

Although MCJIT EHABI is not working yet (needs linking with the right
libraries), this commit also fixes some relocations on MCJIT regarding
the EH tables/lib calls, and update some tests to avoid using EH tables
when none are needed.

The EH tests in the test-suite that were previously disabled on ARM
now pass with these changes, so a follow-up commit on the test-suite
will re-enable them.

llvm-svn: 200388

This commit seeks to do two things:
 - Run the surfeit of tests under the Darwin dialect.  This ends up
   affecting tests which assumed that spaces could deliminate arguments.
 - The GAS dialect tests should limit their surface area to things that
   could plausibly work under GAS. For example, Darwin style arguments
   have no business being in such a test.

llvm-svn: 200383

1. test that inlineasm works
2. test that relaxable instructions are re-encoded in the correct mode.

llvm-svn: 200351

As opposed to GCC/GAS the default ABI for Mips64 is n64.
Compatibility bit should be set if o32 ABI is used when targeting Mips64.

llvm-svn: 200332

This brings MC into line with GNU 'as' on ARM, and it brings the ARM
target into line with most other LLVM targets, which declare the
initial CFI state with addInitialFrameState().

Without this, functions generated with .cfi_startproc/endproc on ARM
will tend to cause GDB to abort with:
  gdb/dwarf2-frame.c:1132: internal-error: Unknown CFA rule.

I've also tested this by comparing the output of "readelf -w" on the
object files produced by llvm-mc and gas when given the .s file added
here.

This change is part of addressing PR18636.

Differential Revision: http://llvm-reviews.chandlerc.com/D2597

llvm-svn: 200255

This commit allows LLVM MC to process .cfi_startproc directives when
they are followed by an additional `simple' identifier. This signals to
elide the emission of target specific CFI instructions that would
normally occur initially.

This fixes PR16587.

Differential Revision: http://llvm-reviews.chandlerc.com/D2624

llvm-svn: 200227

Placed the MC variant diagnostics in the wrong directory accidentally.  Move
them into their respective architecture specific directories.

llvm-svn: 200161

If a complex expression was passed to the .word directive and the first part of
the directive failed to parse, a secondary diagnostic would be produced that
would clutter the error diagnostics.  Improve the diagnostics by consuming the
remainder of the statement.

llvm-svn: 200160

An emitted diagnostic for an invalid relocation variant would place the caret on
the token following the relocation variant indicator or at the end of the line
if there was no following token.  This change corrects the placement of the
caret to point to the token.

llvm-svn: 200159

These were:
* noreorder handling on the target object streamer and asm parser.
* setting the initial flag bits based on the enabled features.
* setting the elf header flag for micromips

It is *really* depressing I am the one doing this instead of someone at
mips actually taking the time to understand the infrastructure.

llvm-svn: 200138

This is an expanded version of r200064.

llvm-svn: 200115

llvm-svn: 200112

llvm-svn: 200083

r200064 depends on r200051.

r200051 is broken: I tries to replace .mips_hack_elf_flags, which is a good
thing, but what it replaces it with is even worse.

The new emitMipsELFFlags it adds corresponds to no assembly directive, is not
marked as a hack and is not even printed to the .s file.

The patch also introduces more uses of hasRawTextSupport.

The correct way to remove .mips_hack_elf_flags is to have the mips target
streamer handle the default flags (and command line options). That way the
same code path is used for asm and obj. The streamer interface should *really*
correspond to what is printed in the .s file.

llvm-svn: 200078

No code changes. Just reassignment of test case files.

llvm-svn: 200064

This patch uses a common MipsTargetSteamer interface for both 
MipsAsmPrinter and MipsAsmParser for recording default and commandline
driven directives that affect ELF header flags.

It has been noted that the .ll tests affected by this patch belong in
test/Codegen/Mips. I will move them in a separate patch.

Also, a number of directives do not get expressed by AsmPrinter in the 
resultant .s assembly such as setting the correct ASI. I have noted this
in the tests and they will be addressed in later patches.

llvm-svn: 200051

Sweep the codebase for common typos. Includes some changes to visible function
names that were misspelt.

llvm-svn: 200018

Add test cases to check parsing of v9 double registers and their aliased quad registers.

llvm-svn: 199974