call and invoke instructions that are known to not write to memory.

llvm-svn: 12807

This transforms code like this:

   %C = or %A, %B
   %D = select %cond, %C, %A
into:
   %C = select %cond, %B, 0
   %D = or %A, %C

Since B is often a constant, the select can often be eliminated.  In any case,
this reduces the usage count of A, allowing subsequent optimizations to happen.

This xform applies when the operator is any of:
  add, sub, mul, or, xor, and, shl, shr

llvm-svn: 12800

  if (C)
    V1 |= V2;

into:
  Vx = V1 | V2;
  V1 = select C, V1, Vx

when the expression can be evaluated unconditionally and is *cheap* to
execute.  This limited form of if conversion is quite handy in lots of cases.
For example, it turns this testcase into straight-line code:

int in0 ; int in1 ; int in2 ; int in3 ;
int in4 ; int in5 ; int in6 ; int in7 ;
int in8 ; int in9 ; int in10; int in11;
int in12; int in13; int in14; int in15;
long output;

void mux(void) {
  output =
      (in0   ?  0x00000001 : 0) | (in1   ?  0x00000002 : 0) |
      (in2   ?  0x00000004 : 0) | (in3   ?  0x00000008 : 0) |
      (in4   ?  0x00000010 : 0) | (in5   ?  0x00000020 : 0) |
      (in6   ?  0x00000040 : 0) | (in7   ?  0x00000080 : 0) |
      (in8   ?  0x00000100 : 0) | (in9   ?  0x00000200 : 0) |
      (in10  ?  0x00000400 : 0) | (in11  ?  0x00000800 : 0) |
      (in12  ?  0x00001000 : 0) | (in13  ?  0x00002000 : 0) |
      (in14  ?  0x00004000 : 0) | (in15  ?  0x00008000 : 0) ;
}

llvm-svn: 12798

is listed first and the address is listed second.

llvm-svn: 12795

that have a constant operand.  This implements
add.ll:test19, shift.ll:test15*, and others that are not tested

llvm-svn: 12794

llvm-svn: 12793

llvm-svn: 12791

llvm-svn: 12787

InstSelectSimple.cpp:
  Change the checks for proper I/O port address size into an exit() instead
  of an assertion.  Assertions aren't used in Release builds, and handling
  this error should be graceful (not that this counts as graceful, but it's
  more graceful).

  Modified the generation of the IN/OUT instructions to have 0 arguments.
X86InstrInfo.td:
  Added the OpSize attribute to the 16 bit IN and OUT instructions.

llvm-svn: 12786

llvm-svn: 12784

I/O port instructions on x86.  The specific code sequence is tailored to
the parameters and return value of the intrinsic call.
Added the ability for implicit defintions to be printed in the Instruction
Printer.
Added the ability for RawFrm instruction to print implict uses and
defintions with correct comma output.  This required adjustment to some
methods so that a leading comma would or would not be printed.

llvm-svn: 12782

The Verifier ensures that their parameters are of integral types and have
the correct sign, but it does not enforce any size restrictions because
such restrictions are platform dependent.

llvm-svn: 12781

llvm-svn: 12779

Now we collect all of the call sites we are interested in inlining, then inline
them.  This entirely avoids issues with trying to inline a call site we got by
inlining another call site.  This also eliminates iterator invalidation issues.

llvm-svn: 12770

llvm-svn: 12769

llvm-svn: 12766

llvm-svn: 12765

llvm-svn: 12764

llvm-svn: 12762

llvm-svn: 12760

llvm-svn: 12759

llvm-svn: 12758

function prologues, and fix an off-by-one in visitCallInst that was
putting call args into the wrong registers.

llvm-svn: 12757

trying to get incoming args off the stack, instead of the %i0...%i6 regs,
which is wrong.

llvm-svn: 12756

llvm-svn: 12754

have no good way of handling this until the code generator is improved.
We should probably just emit V9 instructions in the meantime.

llvm-svn: 12745

llvm-svn: 12744

llvm-svn: 12743

llvm-svn: 12742

llvm-svn: 12741

llvm-svn: 12740

llvm-svn: 12739

llvm-svn: 12737

llvm-svn: 12736

llvm-svn: 12735

llvm-svn: 12734

llvm-svn: 12733

Preliminary support for division. It's gross because you have to initialize
the "Y" register, which is the top 32 bits of the thing you're dividing.

llvm-svn: 12732

llvm-svn: 12731

llvm-svn: 12730