Commits · d11ea81db0df04e5ed8ae25261ff83625de115ba · Roger Ferrer / llvm-epi-0.8 · GitLab

This project is archived. Its data is read-only.

Jul 14, 2011
- Add code to handle a "frameless" unwind stack. · d11ea81d
  Bill Wendling authored Jul 13, 2011
  d11ea81d
- ARM Assembler support for DBG instruction. · 507ba774
  Jim Grosbach authored Jul 13, 2011
  507ba774
- We already support 256-bit packed ADD, SUB, DIV, MUL. Add testcases. · 3c4d6522
  Bruno Cardoso Lopes authored Jul 13, 2011
  3c4d6522
- ARM parsing and encoding tests for CMN/CMP. · 307de018
  Jim Grosbach authored Jul 13, 2011
  307de018
- struct Init -> class Init · 9908c176
  David Greene authored Jul 13, 2011
  9908c176
- Revert r135074 and r135080. They broke clamscan. · fae30b24
  Jakob Stoklund Olesen authored Jul 13, 2011
  fae30b24
- Shuffle ARM assembly tests a bit. · 9559d360
  Jim Grosbach authored Jul 13, 2011
  9559d360
- Revert 135093. Think-o. · c5b4019a
  Jim Grosbach authored Jul 13, 2011
  c5b4019a
- Correct range for thumb co-processor immediate · ccc20777
  Jim Grosbach authored Jul 13, 2011
  ccc20777
- Range checking for CDP[2] immediates. · 31756c22
  Jim Grosbach authored Jul 13, 2011
  31756c22
Jul 13, 2011
- Make X86ISD::ANDNP more general and Codegen 256-bit VANDNP. A more · 9613b649
  Bruno Cardoso Lopes authored Jul 13, 2011
  9613b649
- The target specific node PANDN name is misleading. That happens because · 7ba479d2
  Bruno Cardoso Lopes authored Jul 13, 2011
  7ba479d2
- Cleanup Thumb co-processor instructions a bit. · ca7150b5
  Jim Grosbach authored Jul 13, 2011
  ca7150b5
- Make sure we don't combine a large displacement and a frame index in the same... · 344ec797
  Eli Friedman authored Jul 13, 2011
  344ec797
- Parameterize away the ARM T1Cop class. · cabb48d5
  Jim Grosbach authored Jul 13, 2011
  cabb48d5
- Fix predicates for Thumb co-processor instructions. · adb29b6d
  Jim Grosbach authored Jul 13, 2011
  adb29b6d
- Only keep the global split candidates that work out. · 5fba5b8e
  Jakob Stoklund Olesen authored Jul 13, 2011
  5fba5b8e
- Refactor out checking for displacements on x86-64 addressing modes. No... · ef67e7d6
  Eli Friedman authored Jul 13, 2011
  ef67e7d6
- Testcases for ARM assembly BX/BXJ instructions. · ec898911
  Jim Grosbach authored Jul 13, 2011
  ec898911
- Fix encoding for ARM BXJ instruction. · e2f9840c
  Jim Grosbach authored Jul 13, 2011
  e2f9840c
- Fix encoding of predicate bits on ARM BX_pred. · 801d3ad1
  Jim Grosbach authored Jul 13, 2011
  801d3ad1
- Move the InterferenceCache cursor into the GlobalSplitCand struct. · 7bb72e28
  Jakob Stoklund Olesen authored Jul 13, 2011
  7bb72e28
- Testcases for ARM assembly BLX/BL instructions. · 2371a3f1
  Jim Grosbach authored Jul 13, 2011
  2371a3f1
- Range checking for 16-bit immediates in ARM assembly. · 975b641e
  Jim Grosbach authored Jul 13, 2011
  975b641e
- Revert r135042. As Chris pointed out, it had no effect, and was based on · 5e4416e8
  Jay Foad authored Jul 13, 2011
  5e4416e8
- Fix up TargetLoweringObjectFile ctors to properly initialize fields. · 2d7faa5e
  Evan Cheng authored Jul 13, 2011
  2d7faa5e
- Give the ARM BKPT instruction the right operand type. · e255be93
  Jim Grosbach authored Jul 13, 2011
  e255be93
- Change test case, one that actually failed before my commit. · 4a40a747
  Evan Cheng authored Jul 13, 2011
  4a40a747
- Add tests for ARM parsing of 'BKPT' instruction. · c845e553
  Jim Grosbach authored Jul 13, 2011
  c845e553
- Fix copy-pasto. · 43b45e27
  Jim Grosbach authored Jul 13, 2011
  43b45e27
- Add tests for ARM parsing of 'BIC' instruction. · 4f0f2ac7
  Jim Grosbach authored Jul 13, 2011
  4f0f2ac7
- Add some FIXMEs. · 6cfb1573
  Jim Grosbach authored Jul 13, 2011
  6cfb1573
- Revert accidental commit. · d78e0c22
  Evan Cheng authored Jul 13, 2011
  d78e0c22
- It's not safe to fold (fptrunc (sqrt (fpext x))) to (sqrtf x) if there is... · b94674b3
  Evan Cheng authored Jul 13, 2011
  b94674b3
- Add tests for ARM parsing of 'AND' instruction. · b7cdd877
  Jim Grosbach authored Jul 13, 2011
  b7cdd877
- Improve ARM assembly parsing diagnostics a bit. · bb24c595
  Jim Grosbach authored Jul 13, 2011
  bb24c595
- Add tests for ARM parsing of 'ADD' instruction · 61a9f2af
  Jim Grosbach authored Jul 13, 2011
  61a9f2af
- Destination register operand is optional for ADC and SBC ARM. · 04afb071
  Jim Grosbach authored Jul 13, 2011
  04afb071
- Flesh out ARM Parser support for shifted-register operands. · 7dcd1354
  Jim Grosbach authored Jul 13, 2011
  7dcd1354
- 80 columns. · 06210a28
  Jim Grosbach authored Jul 13, 2011
  06210a28