llvm-svn: 84596

functions are not needed.

llvm-svn: 84587

llvm-svn: 84586

llvm-svn: 84585

llvm-svn: 84583

reasonable code like Codegen/ARM/2009-02-27-SpillerBug.ll, producing 
identical output except for superior formatting of constant pool entries.

llvm-svn: 84582

llvm-svn: 84579

llvm-svn: 84577

llvm-svn: 84575

llvm-svn: 84573

Leave Inst{11-8}, which represents the starting byte index of the extracted
result in the concatenation of the operands and is left unspecified.

Patch by Johnny Chen.

llvm-svn: 84572

Patch by Johnny Chen.

llvm-svn: 84570

no functionality change.

llvm-svn: 84567

by ignoring all implicit regs when lowering.

llvm-svn: 84566

llvm-svn: 84565

llvm-svn: 84563

llvm-svn: 84562

llvm-svn: 84561

like:

@ BB#1:
	.align	2
LCPI1_0:
	.long	L_.str-(LPC0+8)

Note that proper indentation of the label :)

llvm-svn: 84558

appropriate restore location for the spill as well as perform the actual
save and restore.

The Thumb1 target uses this to make sure R12 is not clobbered while a spilled
scavenger register is live there.

llvm-svn: 84554

llvm-svn: 84553

numbering first class aggregate instructions while we're at it.

llvm-svn: 84547

_main:
	stmsp! sp!, {r7, lr}
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, [sp]
	ldr r0, LCPI1_0
	bl _printf
	ldr r0, [sp]
	mov sp, r7
	ldmsp! sp!, {r7, pc}

Note the unhappy ldm/stm because of modifiers being ignored.

llvm-svn: 84546

broken makefile deps :(

llvm-svn: 84544

_main:
	stm , 
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, [sp]
	ldr r0, LCPI1_0
	bl _printf
	ldr r0, [sp]
	mov sp, r7
	ldm , 

llvm-svn: 84543

lowering stuff.  We can now compile hello world to:

_main:
	stm , 
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, 
	ldr r0, 
	bl _printf
	ldr r0, 
	mov sp, r7
	ldm , 

Almost looks like arm code :)

llvm-svn: 84542

Malloc calls are marked NoAlias, so the code below the isMalloc() check makes it redundant.  Removing the isMalloc() check.

llvm-svn: 84541

llvm-svn: 84540

llvm-svn: 84536

_main:
	stm , 
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, 

llvm-svn: 84535

llvm-svn: 84533

we abort:

_main:
	stm , 
	mov r7, sp
	sub sp, sp, 
	mov r0, 
	str r0, 

llvm-svn: 84532

llvm-svn: 84531

through mcinst lowering -> mcinstprinter, when llc is passed
the -enable-arm-mcinst-printer flag.  Currently this
is very "aborty".

llvm-svn: 84530

at the moment.

llvm-svn: 84529

"something" when printing MCInsts, it will just be missing all the 
operand info.

llvm-svn: 84528

llvm-svn: 84527

All of these "subreg32" modifier instructions are handled
explicitly by the MCInst lowering phase.  If they got to
the asmprinter, they would explode.  They should eventually
be replace with correct use of subregs.

llvm-svn: 84526

The JITResolver maps Functions to their canonical stubs and all callsites for
lazily-compiled functions to their target Functions. To make Function
destruction work, I'm going to need to remove all callsites on destruction, so
this patch also adds the reverse mapping for that.

There was an incorrect assumption in here that the only stub for a function
would be the one caused by needing to lazily compile it, while x86-64 far calls
and dlsym-stubs could also cause such stubs, but I didn't look for a test case
that the assumption broke.

This also adds DenseMapInfo<AssertingVH> so I can use DenseMaps instead of
std::maps.

llvm-svn: 84522

llvm-svn: 84521