llvm-svn: 7182

llvm-svn: 7181

allow, i.e. make a sequence of instructions to enable an indirect call using
jump-and-link and 2 temporary registers (which we save and ultimately restore).

Warning: if the delay slot of a function call is used to do meaningful work and
not just a NOP, this behavior is incorrect. However, the Sparc backend does not
yet utilize the delay slots effectively, so it is not necessary to make an
overly complicated algorithm for something that's not used.

llvm-svn: 7178

* FP double registers are now coded correctly
* Removed function which converted registers based on register types, it was
  broken (because regTypes are broken)

llvm-svn: 7175

llvm-svn: 7173

out the entire llvm disassembly for the function at global constant-output
time, which caused the assembler to barf in 164.gzip. This fixes that
particular problem (though 164.gzip has other problems with X86 llc.)

llvm-svn: 7168

Fhourstones, McCat-vor, and many others...)

Printer.cpp: Print implicit uses for AddRegFrm instructions.  Break gas
bug workarounds up into separate stanzas of code for each bug.  Add new
workarounds for fild and fistp.

X86InstrInfo.def: Add O_ST0 implicit uses for more FP instrs where they
obviously apply. Also add PrintImplUses flags for FP instrs where they
are necessary for gas to understand the output.

llvm-svn: 7165

(1) Cannot use ANDN(ot), ORN, and XORN for boolean ops, only bitwise ops.

(2) Conditional move instructions must distinguish signed and unsigned
    condition codes, e.g., MOVLE vs. MOVLEU.

(3) Conditional-move-on-register was using the cond-move-on-cc opcodes,
    which produces a valid-looking instruction with bogus registers!

(4) Here's a really cute one: dividing-by-2^k for negative numbers needs to
    add 2^k-1 before shifting, not add 1 after shifting.  Sadly, these
    are the same when k=0 so our poor test case worked fine.

(5) Casting between signed and unsigned values was not correct:
    completely reimplemented.

(6) Zero-extension on unsigned values was bogus: I was only doing the
    SRL and not the SLLX before it.  Don't know WHAT I was thinking!

(7) And the most important class of changes: Sign-extensions on signed values.
    Signed values are not sign-extended after ordinary operations,
    so they must be sign-extended before the following cases:
	-- passing to an external or unknown function
	-- returning from a function
	-- using as operand 2 of DIV or REM
	-- using as either operand of condition-code setting operation
           (currently only SUBCC), with smaller than 32-bit operands


Also, a couple of improvements:

(1) Fold cast-to-bool into Not(bool).  Need to do this for And, Or, XOR also.

(2) Convert SetCC-Const into a conditional-move-on-register (case 41)
    if the constant is 0.  This was only being done for branch-on-SetCC-Const
    when the branch is folded with the SetCC-Const.

llvm-svn: 7159

llvm-svn: 7158

boolean operations: AND, OR, XOR.

llvm-svn: 7157

(1) An int CC live range must be spilled if there are any interferences,
    even if no other "neighbour" in the interf. graph has been allocated
    that reg. yet.  This is actually true of any class with only one reg!

(2) SparcIntCCRegClass::colorIGNode sets the color even if the LR must
    be spilled so that the machine-independent spill code doesn't have to
    make the machine-dependent decision of which CC name to use based on
    operand type: %xcc or %icc.  (These are two halves of the same register.)

(3) LR->isMarkedForSpill() is no longer the same as LR->hasColor().
    These should never have been the same, and this is necessary now for #2.

(4) All RDCCR and WRCCR instructions are directly generated with the
    phony number for %ccr so that EmitAssembly/EmitBinary doesn't have to
    deal with this.

llvm-svn: 7151

llvm-svn: 7120

some comments.

llvm-svn: 7119

instructions, by outputting them as bytes.

llvm-svn: 7115

llvm-svn: 7114

llvm-svn: 7113

integer overflow):
We need to use %icc and not %xcc for comparisons on 32-bit or smaller
integer values.

llvm-svn: 7111

llvm-svn: 7109

correct: empirically, "regType" is wrong for a number of registers. Thus, one
can only rely on the "regClass" to figure out what kind of register one is
dealing with.

This change switches to using only "regClass" and adds a few extra DEBUG() print
statements and a few clean-ups in comments and code, mostly minor.

llvm-svn: 7103

  the TableGen descriptions; all unset bits are thus errors.
* As a result, found and fixed instructions where some operands were not
  actually assigned into the right portion of the instruction.

llvm-svn: 7074

llvm-svn: 7073

use an immediate value instead of a register.

llvm-svn: 7072

llvm-svn: 7071

area to avoid using up precious stack space within the 4095 offset limit
from %fp.  Such objects that would themselves live at a large offset
were being put there already so this is a simple change.

llvm-svn: 7066

    deletes it, but we were merrily trying to fix the operands of that
    instruction anyway!  Instead, fix the replacement instruction.

(2) An Improvement: Check for and extract global values in all operands,
    not just in known pointer operands.  For example, they can occur in
    call arguments, and probably other unforeseeable places as well.
    This also eliminates the special-case handling of Load and Store.

llvm-svn: 7053

(1) select: Ok to convert a pointer to a float or double.
(2) regalloc: Some MachineInstr* for caller-saving code before a call
    were being inserted before and after the call!
(3) Don't insert the caller-saving instructions in the
    MachineCodeForInstruction for the Call instruction.
    *All* instructions generated by register allocation need to be
    recorded in those maps, but it needs to be done uniformly.

llvm-svn: 7051

system.

llvm-svn: 7014

leaving trash in the register, fixing anagram

llvm-svn: 7013

and longjmp as an abort!

llvm-svn: 6977

SingleSource except oopack and Oscar.  (Sorry, Oscar.)

include/llvm/Target/TargetInstrInfo.h: Remove virtual print method. Add
 accessors for ImplicitUses/Defs.
lib/Target/TargetInstrInfo.cpp: Remove virtual print method. If you
 really wanted this, just use MI->print(O, TM); instead...
lib/Target/X86:
FloatingPoint.cpp: ...like this.
X86InstrInfo.h: Remove virtual print method. Define the PrintImplUses
 target-specific flag bit.
X86InstrInfo.def: Add the PrintImplUses flag to all the instructions
 which implicitly use CL, because the assembler needs to see the CL in
 order to generate the right instruction.
Printer.cpp: Ditch fnIndex at Chris's request. Now we use CurrentFnName
  to name constants in the constant pool for each function instead. This
  avoids keeping state between runOnMachineFunction() invocations, which
  is a no-no. Having MangledGlobals be global is a bogon I'd like to get
  rid of too, but making it a static member of Printer causes link errors
  (why???).
 Make NumberForBB into a member of Printer instead of a global, too.
 Make printOp and printMemReference into methods of Printer.
 X86InstrInfo::print is now Printer::printMachineInstruction, because
  TargetInstrInfo::print is history. (Because of this, we have to qualify
  the names of some TargetInstrInfo methods we call.)
 Print out the ImplicitUses field of any instruction we print that has
  the PrintImplUses bit set.

llvm-svn: 6924

and i is the constant pool index.

llvm-svn: 6920

llvm-svn: 6908

Shootout, but it has some issues with bigger programs. Work in progress.

llvm-svn: 6907

llvm-svn: 6859

llvm-svn: 6844

llvm-svn: 6831

This allows us to not force the use of the EAX/AX registers!

llvm-svn: 6830

llvm-svn: 6829

llvm-svn: 6828

llvm-svn: 6821