llvm-svn: 45075

X86CodeEmitter.cpp:378: failed assertion `0 && "Immediate size not set!"'

I *think* this is right, but Evan, please verify.  It also looks like
CMPSDrr and maybe others are missing this info.  Evan, plz investigate.

llvm-svn: 45074

llvm-svn: 45058

llvm-svn: 45041

Fix (mem) <-> low 64-bits of xmm bugs pointed out by David Greene. Mac OS X Leopard assembler recognizes movq.

llvm-svn: 45040

for parameter passing (only for that, on Darwin).

llvm-svn: 45038

llvm-svn: 45037

llvm-svn: 45036

llvm-svn: 45030

Fix ctlz and cttz. llvm definition requires them to return number of bits in of the src type when value is zero.

llvm-svn: 45029

llvm-svn: 45024

llvm-svn: 44970

Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.

llvm-svn: 44960

SelectionDAG::getConstant, in the same way as vector floating-point
constants. This allows the legalize expansion code for @llvm.ctpop and
friends to be usable with vector types.

llvm-svn: 44954

llvm-svn: 44929

Lower a build_vector with all constants into a constpool load unless it can be done with a move to low part.

llvm-svn: 44921

llvm-svn: 44904

llvm-svn: 44869

possible before resorting to pextrw and pinsrw.
- Better codegen for v4i32 shuffles masquerading as v8i16 or v16i8 shuffles.
- Improves (i16 extract_vector_element 0) codegen by recognizing
  (i32 extract_vector_element 0) does not require a pextrw.

llvm-svn: 44836

llvm-svn: 44835

llvm-svn: 44820

llvm-svn: 44819

Use it for Darwin.

llvm-svn: 44818

These should probably be something like:

  CFI(".cfi_def_cfa_offset 16\n")

where CFI is defined to a noop on darwin and other platforms
that don't support those directives.

llvm-svn: 44803

All bad stuff from SSE version is implicitely inherited :)

llvm-svn: 44794

broken, because doesn't mark xmm regs properly

llvm-svn: 44793

This will allow us (theoretically) to unwind through JITer.
The code wasn't verified, so I'm pretty sure offsets are wrong :)

llvm-svn: 44792

llvm-svn: 44727

what 'Available' is, please add a comment near it and rename it
if appropriate.

llvm-svn: 44703

  isTriviallyReMaterializable -> hasNoSideEffects
  isReallyTriviallyReMaterializable -> isTriviallyReMaterializable

llvm-svn: 44702

llvm-svn: 44686

llvm-svn: 44676

Remove a bogus optimization. It's not possible to do a move to low element to a <8 x i16> or <16 x i8> vector.

llvm-svn: 44669

llvm-svn: 44637

the stored register is killed.

llvm-svn: 44600

llvm-svn: 44517

llvm-svn: 44479

llvm-svn: 44371

the function type, instead they belong to functions
and function calls.  This is an updated and slightly
corrected version of Reid Spencer's original patch.
The only known problem is that auto-upgrading of
bitcode files doesn't seem to work properly (see
test/Bitcode/AutoUpgradeIntrinsics.ll).  Hopefully
a bitcode guru (who might that be? :) ) will fix it.

llvm-svn: 44359

sometimes emit "zero" and "all one" vectors multiple times,
for example:

_test2:
	pcmpeqd	%mm0, %mm0
	movq	%mm0, _M1
	pcmpeqd	%mm0, %mm0
	movq	%mm0, _M2
	ret

instead of:

_test2:
	pcmpeqd	%mm0, %mm0
	movq	%mm0, _M1
	movq	%mm0, _M2
	ret

This patch fixes this by always arranging for zero/one vectors
to be defined as v4i32 or v2i32 (SSE/MMX) instead of letting them be
any random type.  This ensures they get trivially CSE'd on the dag.
This fix is also important for LegalizeDAGTypes, as it gets unhappy
when the x86 backend wants BUILD_VECTOR(i64 0) to be legal even when
'i64' isn't legal.

This patch makes the following changes:

1) X86TargetLowering::LowerBUILD_VECTOR now lowers 0/1 vectors into
   their canonical types.
2) The now-dead patterns are removed from the SSE/MMX .td files.
3) All the patterns in the .td file that referred to immAllOnesV or
   immAllZerosV in the wrong form now use *_bc to match them with a
   bitcast wrapped around them.
4) X86DAGToDAGISel::SelectScalarSSELoad is generalized to handle 
   bitcast'd zero vectors, which simplifies the code actually.
5) getShuffleVectorZeroOrUndef is updated to generate a shuffle that
   is legal, instead of generating one that is illegal and expecting
   a later legalize pass to clean it up.
6) isZeroShuffle is generalized to handle bitcast of zeros.
7) several other minor tweaks.

This patch is definite goodness, but has the potential to cause random
code quality regressions.  Please be on the lookout for these and let 
me know if they happen.

llvm-svn: 44310