llvm-svn: 169907

Loop Vectorize: optimize the vectorization of trunc(induction_var). The truncation is now done on scalars.

llvm-svn: 169904

because that method is only getting called for MCInstFragment. These
fragments aren't even generated when RelaxAll is set, which is why the
flag reference here is superfluous. Removing it simplifies the code
with no harmful effects.

An assertion is added higher up to make sure this path is never
reached.

llvm-svn: 169886

llvm-svn: 169881

llvm-svn: 169880

Since now we have an autogenerated TOC, a manually written table of all passes
was removed.

Patch by Anthony Mykhailenko with small fixes by me.

llvm-svn: 169867

llvm-svn: 169862

Use explicitely aligned store and load instructions to deal with argument and
retval shadow. This matters when an argument's alignment is higher than
__msan_param_tls alignment (which is the case with __m128i).

llvm-svn: 169859

llvm-svn: 169854

instead of the instruction. I've left a forwarding wrapper for the
instruction so users with the instruction don't need to create
a GEPOperator themselves.

This lets us remove the copy of this code in instsimplify.

I've looked at most of the other copies of similar code, and this is the
only one I've found that is actually exactly the same. The one in
InlineCost is very close, but it requires re-mapping non-constant
indices through the cost analysis value simplification map. I could add
direct support for this to the generic routine, but it seems overly
specific.

llvm-svn: 169853

the GEP instruction class.

This is part of the continued refactoring and cleaning of the
infrastructure used by SROA. This particular operation is also done in
a few other places which I'll try to refactor to share this
implementation.

llvm-svn: 169852

instead of EVTs.

llvm-svn: 169851

MVTs, instead of EVTs.

Accordingly, add bitsLT (and similar) to MVT.

llvm-svn: 169850

from EVT.

llvm-svn: 169849

EVTs.

llvm-svn: 169848

EVTs.

llvm-svn: 169847

getIndexedStoreAction, and addRegisterClass to take an MVT, instead
of EVT.

llvm-svn: 169846

of EVT.

llvm-svn: 169845

instead of EVTs.

llvm-svn: 169844

llvm-svn: 169843

EVT.

llvm-svn: 169842

llvm-svn: 169841

llvm-svn: 169840

llvm-svn: 169839

EVT.

Accordingly, change RegDefIter to contain MVTs instead of EVTs.

llvm-svn: 169838

Accordingly, add helper funtions getSimpleValueType (in parallel to
getValueType) in SDValue, SDNode, and TargetLowering.

This is the first, in a series of patches.

llvm-svn: 169837

llvm-svn: 169823

llvm-svn: 169821

llvm-svn: 169819

-#include "llvm/Target/TargetTransformImpl.h"
-#include "llvm/TargetTransformInfo.h"

llvm-svn: 169818

llvm-svn: 169817

llvm-svn: 169814

llvm-svn: 169813

llvm-svn: 169812

llvm-svn: 169811

llvm-svn: 169803

try to reduce the width of this load, and would end up transforming:

  (truncate (lshr (sextload i48 <ptr> as i64), 32) to i32)
to
  (truncate (zextload i32 <ptr+4> as i64) to i32)

We lost the sext attached to the load while building the narrower i32
load, and replaced it with a zext because lshr always zext's the
results. Instead, bail out of this combine when there is a conflict
between a sextload and a zext narrowing. The rest of the DAG combiner
still optimize the code down to the proper single instruction:

  movswl 6(...),%eax

Which is exactly what we wanted. Previously we read past the end *and*
missed the sign extension:

  movl 6(...), %eax

llvm-svn: 169802

This test case uses -mcpu=corei7 so it belongs in CodeGen/X86

Reviewed by: Nadav

llvm-svn: 169801

llvm-svn: 169798

This shouldn't affect codegen for -O0 compiles as tail call markers are not
emitted in unoptimized compiles.  Testing with the external/internal nightly
test suite reveals no change in compile time performance.  Testing with -O1,
-O2 and -O3 with fast-isel enabled did not cause any compile-time or
execution-time failures.  All tests were performed on my x86 machine.
I'll monitor our arm testers to ensure no regressions occur there.

In an upcoming clang patch I will be marking the objc_autoreleaseReturnValue
and objc_retainAutoreleaseReturnValue as tail calls unconditionally.  While
it's theoretically true that this is just an optimization, it's an
optimization that we very much want to happen even at -O0, or else ARC
applications become substantially harder to debug.

Part of rdar://12553082

llvm-svn: 169796