llvm-svn: 84191

PIC16Section class", it breaks globals.ll.

llvm-svn: 84184

derived from MCSection.

llvm-svn: 84180

llvm-svn: 84179

improve alias results if constant, and the source pointer can't be modified.

llvm-svn: 84175

llvm-svn: 84174

llvm-svn: 84173

When ARMConstantIslandPass cannot find any good locations (i.e., "water") to
place constants, it falls back to inserting unconditional branches to make a
place to put them.  My recent change exposed a problem in this area.  We may
sometimes append to the same block more than one unconditional branch.  The
symptoms of this are that the generated assembly has a branch to an undefined
label and running llc with -debug will cause a seg fault.

This happens more easily since my change to prevent CPEs from moving from
lower to higher addresses as the algorithm iterates, but it could have
happened before.  The end of the block may be in range for various constant
pool references, but the insertion point for new CPEs is not right at the end
of the block -- it is at the end of the CPEs that have already been placed
at the end of the block.  The insertion point could be out of range.  When
that happens, the fallback code will always append another unconditional
branch if the end of the block is in range.

The fix is to only append an unconditional branch if the block does not
already end with one.  I also removed a check to see if the constant pool load
instruction is at the end of the block, since that is redundant with
checking if the end of the block is in-range.

There is more to be done here, but I think this fixes the immediate problem.

llvm-svn: 84172

don't bother every time going around the main worklist.  This speeds up a 
release-asserts opt -std-compile-opts on 403.gcc by about 4% (1.5s).  It
seems to speed up the most expensive instances of instcombine by ~10%.

llvm-svn: 84171

instruction (which disqualifies stores, unreachable, etc) and at least the
first operand is a constant.  This filters out a lot of obvious cases that
can't be folded.  Also, switch the IRBuilder to a TargetFolder, which tries
harder.

llvm-svn: 84170

only dereference the element they point to directly with no pointer arithmetic.

llvm-svn: 84159

header is just the entry block to the loop, and it needn't be at
the top of the loop in the code layout.

Remove the code that suppressed loop alignment for outer loops,
so that outer loops are aligned.

llvm-svn: 84158

When LiveVariables is adding implicit-def to model "partial dead", add the earlyclobber marker if the superreg def has it.

llvm-svn: 84153

llvm-svn: 84152

Patch by Johnny Chen.

llvm-svn: 84146

llvm-svn: 84144

llvm-svn: 84138

llvm-svn: 84134

llvm-svn: 84133

Refs: A7-17 & A8-750.

Patch by Johnny Chen.

llvm-svn: 84131

register-shifted-register instructions.  Patch by Johnny Chen.

llvm-svn: 84124

llvm-svn: 84122

llvm-svn: 84118

llvm-svn: 84117

llvm-svn: 84113

vld lane intrinsics.

llvm-svn: 84110

llvm-svn: 84109

so get rid of eh.selector.i64 and rename eh.selector.i32 to eh.selector.
Likewise for eh.typeid.for.  This aligns us with gcc, which always uses a
32 bit value for the selector on all platforms.  My understanding is that
the register allocator used to assert if the selector intrinsic size didn't
match the pointer size, and this was the reason for introducing the two
variants.  However my testing shows that this is no longer the case (I
fixed some bugs in selector lowering yesterday, and some more today in the
fastisel path; these might have caused the original problems).

llvm-svn: 84106

presence of PHI nodes.

llvm-svn: 84103

llvm-svn: 84080

cannot alias the GEP. GEP pointer alias rule states this clearly:
A pointer value formed from a getelementptr instruction is associated with the
addresses associated with the first operand of the getelementptr.

llvm-svn: 84079

llvm-svn: 84074

llvm-svn: 84072

(for uses marked kill and defs marked dead) a few instructions in
addition to forwards. Also, increase the maximum number of instructions
to scan, as it appears to help in a fair number of cases.

llvm-svn: 84061

to remat non-load instructions as loads, and the remat code now uses
the UnmodeledSideEffects flags, MachineMemOperands, and similar things
to decide which instructions are valid for rematerialization.

llvm-svn: 84060

llvm-svn: 84059

llvm-svn: 84055

s/DebugLoc.InlinedLoc/DebugLoc.InlinedAtLoc/g

llvm-svn: 84054

llvm-svn: 84049

by creating TargetConstants during instruction selection instead of during
legalization.

llvm-svn: 84042