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  1. Sep 24, 2007
  2. Sep 23, 2007
    • Dale Johannesen's avatar
      Fix PR 1681. When X86 target uses +sse -sse2, · e36c4002
      Dale Johannesen authored
      keep f32 in SSE registers and f64 in x87.  This
      is effectively a new codegen mode.
      Change addLegalFPImmediate to permit float and
      double variants to do different things.
      Adjust callers.
      
      llvm-svn: 42246
      e36c4002
  3. Sep 22, 2007
  4. Sep 21, 2007
  5. Sep 20, 2007
  6. Sep 19, 2007
  7. Sep 18, 2007
  8. Sep 17, 2007
  9. Sep 16, 2007
  10. Sep 15, 2007
  11. Sep 14, 2007
  12. Sep 13, 2007
    • Evan Cheng's avatar
      Initial support for multi-result patterns: · 59c39dc1
      Evan Cheng authored
      1.
      [(set GR32:$dst, (add GR32:$src1, GR32:$src2)),
       (modify EFLAGS)]
      This indicates the source pattern expects the instruction would produce 2 values. The first is the result of the addition. The second is an implicit definition in register EFLAGS.
      2.
      def : Pat<(parallel (addc GR32:$src1, GR32:$src2), (modify EFLAGS)), ()>
      Similar to #1 except this is used for def : Pat patterns.
      
      llvm-svn: 41897
      59c39dc1
  13. Sep 12, 2007
  14. Sep 11, 2007
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