remove it, fixing PR6909.

llvm-svn: 108125

llvm-svn: 108123

AggressiveAntiDepBreaker should not be using getPhysicalRegisterRegClass. An
instruction might be using a register that can only be replaced with one from
a subclass of getPhysicalRegisterRegClass.

With this patch we use getMinimalPhysRegClass. This is correct, but
conservative. We should check the uses of the register and select the
largest register class that can be used in all of them.

llvm-svn: 108122

Note that the example currently doesn't appear to work.

llvm-svn: 108121

This fixes PR7375.

llvm-svn: 108120

physical register can be allocated in the class of the virtual are sufficient.

I think that the test for virtual registers is more strict than it needs to be,
it should be possible to coalesce two virtual registers the class of one
is a subclass of the other.

llvm-svn: 108118

is involved.

llvm-svn: 108117

by Hans Vandierendonck from PR7605

llvm-svn: 108116

getMinimalPhysRegClass. It was used to produce spills, and it is better to
use the most specific class if possible.

Update getLoadStoreRegOpcode to handle GR32_AD.

llvm-svn: 108115

the LHS and RHS of an and/or instruction, don't multiply add
known predecessor values.  This fixes the crash on testcase
from PR7498

llvm-svn: 108114

llvm-svn: 108113

llvm-svn: 108112

llvm-svn: 108111

patch by Lasse Kärkkäinen in PR7404.

llvm-svn: 108110

intended functionality change.

The avoidance of hoistiing implicitdef seems wrong though.

llvm-svn: 108109

patch by Yuri!

llvm-svn: 108107

llvm-svn: 108103

llvm-svn: 108102

load(gep(alloca)) where the gep is all-zeros. There's more we could do here but
this is a common case.

llvm-svn: 108101

llvm-svn: 108100

The only folding these load/store architectures can do is converting COPY into a
load or store, and the target independent part of foldMemoryOperand already
knows how to do that.

llvm-svn: 108099

operations in x87 code.

llvm-svn: 108098

llvm-svn: 108097

We are generating movaps for all XMM register copies, including scalar
floating point values. This is known to be at least as good as movss and movsd
for all known architectures up to and including Nehalem because it avoids a
partial register stall.

The SSEDomainFix pass will switch movaps to movdqa when appropriate (i.e., when
operands come from the integer unit). We don't now that switching movaps to
movapd has any benefit.

The same applies to andps -> pand.

llvm-svn: 108096

Targets must now implement TargetInstrInfo::copyPhysReg instead. There is no
longer a default implementation forwarding to copyRegToReg.

llvm-svn: 108095

llvm-svn: 108094

The first one was used just to call isSafeToMoveRegClassDefs. In
general, using a more specific reg class is better, in practice only
x86 implements that method and the results are always the same.

The second one is in FindFreeRegister and is used to check if a register
is in a register class, a much more direct call to contains is better as
it should cover more cases and is faster.

llvm-svn: 108093

llvm-svn: 108092

llvm-svn: 108091

assert()s, switching to void-casts. Removed an unneeded Compiler.h include as
a result. There are two other uses in LLVM, but they're not due to assert()s,
so I've left them alone.

llvm-svn: 108088

llvm-svn: 108087

llvm-svn: 108086

llvm-svn: 108084

llvm-svn: 108083

llvm-svn: 108082

llvm-svn: 108081

llvm-svn: 108080

llvm-svn: 108079

llvm-svn: 108078

llvm-svn: 108077