llvm-svn: 116156

llvm-svn: 116155

llvm-svn: 116154

llvm-svn: 116152

llvm-svn: 116151

llvm-svn: 116150

llvm-svn: 116149

llvm-svn: 116148

llvm-svn: 116146

llvm-svn: 116143

llvm-svn: 116142

llvm-svn: 116140

llvm-svn: 116136

llvm-svn: 116135

1. Cortex-A8 load / store multiplies can only issue on ALU0.
2. Eliminate A8_Issue, A8_LSPipe will correctly limit the load / store issues.
3. Correctly model all vld1 and vld2 variants.

llvm-svn: 116134

llvm-svn: 116130

before decrementing. <rdar://problem/8529919>

llvm-svn: 116126

the add/or xform.  The JIT isn't mcized yet, boo.

This fixes Olden/voronoi, bh and a ton of other stuff that
uses the jit.

llvm-svn: 116125

llvm-svn: 116124

llvm-svn: 116123

functions: computeRemainder and rewrite.

When the remainder breaks up into multiple components, remember to rewrite those
uses as well.

llvm-svn: 116121

llvm-svn: 116119

are still way too long, but it's a start.

No functional change intended.

llvm-svn: 116116

Such a check does not make any sense in presense of inlining and other compiler-dependent stuff.
This should fix bunch of warnings on mingw32.

llvm-svn: 116113

concept level stuff at this point, but it is generally working for those
instructions that know how to map the operands.

This patch fills in the register operands for add/sub/or/etc instructions
and adds the conditional execution predicate encoding.

llvm-svn: 116112

llvm-svn: 116107

llvm-svn: 116105

are easier to diff with those produced by llvm-mc.

llvm-svn: 116095

formulae which become illegal as a result of the offset updating don't
escape.

This is for rdar://8529692. No testcase yet, because the given cases
hit use-list ordering differences.

llvm-svn: 116093

llvm-svn: 116083

llvm-svn: 116081

implicit. e.g.
%D6<def>, %D7<def> = VLD1q16 %R2<kill>, 0, ..., %Q3<imp-def>                                                                                                                                                                              
%Q1<def> = VMULv8i16 %Q1<kill>, %Q3<kill>, ...

The real definition indices are 0,1.

llvm-svn: 116080

llvm-svn: 116072

llvm-svn: 116069

llvm-svn: 116068

''const'ify getMachineOpValue() and associated helpers.'

llvm-svn: 116067

llvm-svn: 116064

llvm-svn: 116063

llvm-svn: 116061

llvm-svn: 116059