into XXXGenRegisterInfo.inc.

llvm-svn: 133922

llvm-svn: 133846

target machine from those that are only needed by codegen. The goal is to
sink the essential target description into MC layer so we can start building
MC based tools without needing to link in the entire codegen.

First step is to refactor TargetRegisterInfo. This patch added a base class
MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
separate register description from the rest of the stuff.

llvm-svn: 133782

[AVX] Recorganize X86ShuffleDecode into its own library
(LLVMX86Utils.a) to break cyclic library dependencies between
LLVMX86CodeGen.a and LLVMX86AsmParser.a.  Previously this code was in
a header file and marked static but AVX requires some additional
functionality here that won't be used by all clients.  Since including
unused static functions causes a gcc compiler warning, keeping it as a
header would break builds that use -Werror.  Putting this in its own
library solves both problems at once.

llvm-svn: 125765

been MC-ized for assembly printing. MSP430 is mostly so, but still has the
asm printer and lowering code in the printer subdir for the moment.

llvm-svn: 115360

enhanced disassembler, and the necessary makefile
rules to build the table for X86.

llvm-svn: 94764

llvm-svn: 94378

missing ones are libsupport, libsystem and libvmcore.  libvmcore is
currently blocked on bugpoint, which uses EH.  Once it stops using
EH, we can switch it off.

This #if 0's out 3 unit tests, because gtest requires RTTI information.
Suggestions welcome on how to fix this.

llvm-svn: 94164

incarnations), integrated into the MC framework.  

The disassembler is table-driven, using a custom TableGen backend to 
generate hierarchical tables optimized for fast decode.  The disassembler 
consumes MemoryObjects and produces arrays of MCInsts, adhering to the 
abstract base class MCDisassembler (llvm/MC/MCDisassembler.h).

The disassembler is documented in detail in

- lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime)
- utils/TableGen/DisassemblerEmitter.cpp (table emitter)

You can test the disassembler by running llvm-mc -disassemble for i386
or x86_64 targets.  Please let me know if you encounter any problems
with it.

llvm-svn: 91749

llvm-svn: 89850

 - Not fully enabled yet, need a configure regeneration.

llvm-svn: 76230

llvm-svn: 76213

 - Intended to match current TargetMachine implementations.

 - No facilities for linking these in yet.

llvm-svn: 75751

llvm-svn: 61991

Move X86 assembler printers into separate directory. This allows JIT-only users not to link it in (use 'x86codegen' llvm-config arg for this)

llvm-svn: 54886

llvm-svn: 54806

llvm-svn: 45415

llvm-svn: 34699

llvm-svn: 34694

llvm-svn: 34684

llvm-svn: 31245

llvm-svn: 31244

llvm-svn: 30764

llvm-svn: 30763

llvm-svn: 29627

llvm-svn: 27651

llvm-svn: 25645

by Evan Cheng!

llvm-svn: 24371

llvm-svn: 18987

llvm-svn: 17286

llvm-svn: 17167

Intel and AT&T style assembly language.  The ultimate goal of this is to
eliminate the GasBugWorkaroundEmitter class, but for now AT&T style emission
is not fully operational.

llvm-svn: 16639

llvm-svn: 15787

llvm-svn: 15388

again in the future, it can be resurrected out of CVS

llvm-svn: 15112

Tablgen files for really simple instruction selector

llvm-svn: 12714

llvm-svn: 9761

get just the filename and not the full path, just use the filename directly.

llvm-svn: 9730

llvm-svn: 9312

command line if VERBOSE=1

llvm-svn: 8453