llvm-svn: 125250

llvm-svn: 125249

When matching operands for a candidate opcode match in the auto-generated
AsmMatcher, check each operand against the expected operand match class.
Previously, operands were classified independently of the opcode being
handled, which led to difficulties when operand match classes were
more complicated than simple subclass relationships.

llvm-svn: 125245

of the CPSR during the course of executing an opcode, and modified SelectInstrSet()
to update this variable instead of the original m_inst_cpsr, which should be
the cached copy of the CPSR at the beginning of executing the opcode.

llvm-svn: 125244

Loop splitting is better handled by the more generic global region splitting
based on the edge bundle graph.

llvm-svn: 125243

and a helper method ALUWritePC(Context&, uint32_t).

llvm-svn: 125241

indirect forms, deals with empty DW_AT_comp_dir attributes, and fixups for
handling other signed integer types.

llvm-svn: 125240

I have another way to achieve the same goal.

llvm-svn: 125239

llvm-svn: 125238

This fixes a bug where splitSingleBlocks() could split a live range after a
terminator instruction.

llvm-svn: 125237

llvm-svn: 125236

llvm-svn: 125235

llvm-svn: 125232

No functional changes intended.

llvm-svn: 125231

llvm-svn: 125230

warning when same parameter name used multiple times.
// rdar://8877730

llvm-svn: 125229

name of a path, after resolving symbolic links and eliminating excess
path elements such as "foo/../" and "./".

This routine still needs a Windows implementation, but I don't have a
Windows machine available. Help? Please?

llvm-svn: 125228

effect an interworking branch if the ArchVersion() is ARMv5T and above.

llvm-svn: 125227

llvm-svn: 125226

llvm-svn: 125225

The tag is updated whenever the live interval union is changed, and it is tested
before using cached information.

llvm-svn: 125224

llvm-svn: 125220

llvm-svn: 125219

llvm-svn: 125218

llvm-svn: 125217

llvm-svn: 125216

Now, Syntax is only used as a tie-breaker if the Arch
matches. Previously, a request for x86_64 disassembler followed by the
i386 disassembler in a single process would return the cached x86_64
disassembler. Fixes <rdar://problem/8958982>

llvm-svn: 125215

Update the linux plugin code to use the new check for a valid host
thread introduced in r125067.

llvm-svn: 125213

is in the list of registers to be load and we're in ARMv5T and above, this is an interworking branch.

llvm-svn: 125212

llvm-svn: 125211

llvm-svn: 125210

we want to record it and issue a WriteRegister callback so the clients
can track the mode changes accordingly.

llvm-svn: 125209

module's AST context. Prior to this fix, with gcc binaries, we end up with
a full class definition for any used classes in each compile unit due to the
one definition rule. This would result in us making N copies of class T, where
N is the number of compile units that use class T, in the module AST. When
an expression would then try and use any types that were duplicated, it would
quickly confuse clang and make expression evaluation fail due to all of the
duplicate types that got copied over. This is now fixed by making a map of
types in the DWARF that maps type names to a collection of types + declaration
(file + line number) + DIE. Then later when we find a type we look in this
module map and find any already cached types that we can just use.

8935777

llvm-svn: 125207

since the diagnostic client might poke at source locations that have
not yet been deserialized.

llvm-svn: 125204

llvm-svn: 125203

llvm-svn: 125202

llvm-svn: 125201

llvm-svn: 125200

llvm-svn: 125199

improve interfaces to instsimplify to take this info.

llvm-svn: 125196