I haven't implemented any of the ones that take registers yet. The problem is
that for x86-64 the streamer methods expect a native x86 register number (note:
%r8-%r15 want 8-15 instead of 0-7; same for %xmm8-%xmm15). I haven't figured
out exactly how I want to do that yet.

llvm-svn: 131899

of them, particularly the ones that don't take arguments. Also implement
.seh_proc and .seh_handler.

llvm-svn: 131866

llvm-svn: 131837

llvm-svn: 131836

these tables.

llvm-svn: 131833

directive.

Implement emission of Win64 EH unwind info.

Pull in <cassert> in MCWin64EH.h so it can use the assert() macro.

llvm-svn: 131832

Also, fix threshold for 'Big' register saves.

llvm-svn: 131830

unwind areas.

llvm-svn: 131795

and an exception handler. Handle that case.

Also, add an 'Emitted' member to the MCWin64EHUnwindInfo struct. It will be
needed later.

llvm-svn: 131791

is needed for an upcoming patch.

llvm-svn: 131772

llvm-svn: 131760

llvm-svn: 131755

of tBL/tBLX to R_ARM_THM_CALL (ARM ELF 4.7.1.6)

Patch by koan-sin tan.

llvm-svn: 131748

super.

llvm-svn: 131743

There's really nothing to implement. All this really does is swap to a
pseudo-section that later gets written to the unwind info struct. That
needs to be implemented in the object streamers.

llvm-svn: 131734

foo:
bar = foo
.quad bar

Avoid producing it. Fixes PR9951.

llvm-svn: 131687

* Remove unnecessary arguments now that ForceExpAbs is a method.
* Use ForceExpAbs in EmitAbsValue.

llvm-svn: 131683

llvm-svn: 131679

I had to change the API slightly to avoid overloading issues.

llvm-svn: 131666

Introduce -fatal-assembler-warnings for the obvious purpose

llvm-svn: 131655

llvm-svn: 131653

ours compatible with GAS.

In retrospect, I should have emailed binutils about this earlier. Thanks to
Kai Tietz for pointing out that GAS already had SEH directives.

llvm-svn: 131652

llvm-svn: 131644

llvm-svn: 131629

Based largely on Rafael Espindola's work on CFI. Other methods soon to follow.

llvm-svn: 131623

llvm-svn: 131590

llvm-svn: 131579

- StartChained and EndChained delimit a chained unwind area, which can contain
  additional operations to be undone if an exception occurs inside of it.
- UnwindOnly declares that this function doesn't handle any exceptions. If it
  has a handler, it's an unwind handler instead of an exception handler.
- Lsda declares the location and size of the LSDA, which in the Win64 EH
  scheme is kept inside the UNWIND_INFO struct. Windows itself ignores the
  LSDA; it's used by the Language-Specific Handler (the "Personality Function"
  from DWARF).

llvm-svn: 131572

GAS has no such directives (not even mingw-w64 GAS has them), so I took
creative license with their names in assembly. I prefixed them all with
"w64_" to avoid namespace collisions, for example. If I discover that GAS
has taken a different approach, I'll change ours to match.

llvm-svn: 131525

the purposes of the Win64 EH tables, I realized we had no way to tell where
the function ends. (MASM bounds functions with PROC and ENDP keywords.)
Add a directive to delimit the end of the function, and rename the 'frame'
directive to more accurately reflect its duality with the new directive.

llvm-svn: 131522

self-host :).

llvm-svn: 131421

llvm-svn: 131411

("T is 1 if the target symbol S has type STT_FUNC and the
symbol addresses a Thumb instruction ;it is 0 otherwise."
from "ELF for the ARM Architecture" 4.7.1.2)

Patch by Koan-Sin Tan!

llvm-svn: 131406

llvm-svn: 131384

information.

llvm-svn: 131382

llvm-svn: 131208

LLVM and binutils.

With this patch, there are no functional differences between the .o
produced directly from LLVM versus the .s to .o via GNU as, for relocation tags
at least, for both PIC and non-PIC modes.

Because some non-PIC reloc tags are used (legally) on PIC, so IsPCRel flag is
necessary but not sufficient to determine whether the overall codegen mode is
PIC or not. Why is this necessary? There is an incompatibility of how relocs
are emitted in the .rodata section.  Binutils PIC likes to emit certain relocs
as section relative offsets.  Non-PIC does not do this.

So I added a hidden switch on the ELFObjectwriter "-arm-elf-force-pic" which
forces the objectwriter to pretend that all relocs are for PIC mode.


Todo: Activate ForceARMElfPIC to true if -relocation-model=pic is selected
on llc.

Todo: There are probably more issues for PIC mode on ARM/MC/ELF...

Todo: Existing tests in MC/ARM/elf-reloc*.ll need to be converted over to .s 
tests as well as expanded to cover the gamut.

llvm-svn: 131205

llvm-svn: 131161

llvm-svn: 131149

DwarfRequiresRelocationForSectionOffset as this is not specific to StmtList.

llvm-svn: 131148