getting them out of the business of making stack slots.

llvm-svn: 23180

llvm-svn: 23179

llvm-svn: 23178

llvm-svn: 23177

the ops to dag optimization.

llvm-svn: 23176

llvm-svn: 23173

llvm-svn: 23172

llvm-svn: 23171

llvm-svn: 23170

llvm-svn: 23169

llvm-svn: 23168

fixes crafty and probably others.

llvm-svn: 23167

llvm-svn: 23166

case in MaskedValueIsZero was wrong.

llvm-svn: 23165

MaskedValueIsZero.

llvm-svn: 23164

needed for folding constants in the upcoming dag combiner.

llvm-svn: 23163

ugly hacks

llvm-svn: 23162

Allow physregs to occur in the dag with multiple types.  Though I don't likethis, it is a requirement on PPC, which can have an f32 value in r3 at onepoint in a function and a f64 value in r3 at another point.  :(

This fixes compilation of mesa

llvm-svn: 23161

this, it is a requirement on PPC, which can have an f32 value in r3 at one
point in a function and a f64 value in r3 at another point.  :(

llvm-svn: 23160

llvm-svn: 23159

This fixes PR621 and Regression/CodeGen/X86/2005-08-30-RegAllocAliasProblem.ll

llvm-svn: 23158

llvm-svn: 23157

one.  TODO :)

llvm-svn: 23156

Remove code (last hunk) that miscompiled immediate and's, such as
  and uint %tmp.30, 4294958079

into

 andi. r8, r8, 56319
 andis. r8, r8, 65535

instead of:

 li r9, -9217
 and r8, r8, r9

The first always generates zero.

This fixes espresso.

llvm-svn: 23155

fixes fourinarow

llvm-svn: 23153

fixes fhourstones

llvm-svn: 23152

to SHIFT_PARTS nodes

llvm-svn: 23151

llvm-svn: 23150

at least tends to expose problems elsewhere.

llvm-svn: 23149

llvm-svn: 23148

them.  This allows for elminination of redundant extends in the entry
blocks of functions on PowerPC.

Add support for i32 x i32 -> i64 multiplies, by recognizing when the inputs
to ISD::MUL in ExpandOp are actually just extended i32 values and not real
i64 values.  this allows us to codegen

int mulhs(int a, int b) { return ((long long)a * b) >> 32; }
as:
_mulhs:
        mulhw r3, r4, r3
        blr

instead of:
_mulhs:
        mulhwu r2, r4, r3
        srawi r5, r3, 31
        mullw r5, r4, r5
        add r2, r2, r5
        srawi r4, r4, 31
        mullw r3, r4, r3
        add r3, r2, r3
        blr

with a similar improvement on x86.

llvm-svn: 23147

registers, and the incoming values have already been zero or sign extended
from the appopriate type to the register width.

llvm-svn: 23146

llvm-svn: 23145

llvm-svn: 23144

linking them to calls when appropriate, this prevents the scheduler from
pulling these copies away from the call.

This fixes Ptrdist/yacr2

llvm-svn: 23143

llvm-svn: 23142

fixes MediaBench/toast with the dag selector

llvm-svn: 23141

which I failed to include when I moved the code over.  This fixes
MallocBench/gs.

llvm-svn: 23140

STOREs, know the right type to store.

llvm-svn: 23139

no xcode, this is not right:

   if (!foo) break;
     X;

llvm-svn: 23138