This function doesn't have anything to do with spill weights, and MRI
already has functions for manipulating the register class of a virtual
register.

llvm-svn: 137123

llvm-svn: 137115

llvm-svn: 137114

When this variable is set, "uname -r" will return its value instead of the
real OS version.  Make this affect LLVM's triple for consistency.
<rdar://problem/9919167>

llvm-svn: 137111

LoopUnroll looks like it has some stale code. Remove it to prove my sanity and avoid further confusion.

llvm-svn: 137106

llvm-svn: 137105

llvm-svn: 137104

llvm-svn: 137103

the patterns already there to be more strict regarding the predicate.
This fixes PR10558

llvm-svn: 137100

instead of a vector.

llvm-svn: 137099

The 'unwind' instruction was acting essentially as a placeholder, because it
would be replaced at the end of this function by a branch to the "unwind
handler". The 'unwind' instruction is going away, so use 'unreachable' instead,
which serves the same purpose as a placeholder.

llvm-svn: 137098

llvm-svn: 137096

llvm-svn: 137095

No functional change.

llvm-svn: 137094

llvm-svn: 137091

llvm-svn: 137090

RegisterCoalescer.h still has the CoalescerPair class interface.

llvm-svn: 137088

llvm-svn: 137085

A public interface is no longer needed since RegisterCoalescer is not an
analysis any more.

llvm-svn: 137082

Fix the instruction representation to correctly only allow post-indexed form.
Add tests.

llvm-svn: 137074

llvm-svn: 137073

Patch by Jingyue!

llvm-svn: 137072

llvm-svn: 137071

llvm-svn: 137070

They improve the verbose assembly.

llvm-svn: 137069

llvm-svn: 137067

Allow labels for load/store instructions when parsing. There's encoding
issues, still, so this doesn't work all the way through, yet.

llvm-svn: 137064

These the methods are target-independent since they simply scan the
memory operands.  They can live in TargetInstrInfoImpl.

llvm-svn: 137063

Fix encodings for Thumb ASR and LSR immediate operands.  They encode the range 1-32, with 32 encoded as 0.

llvm-svn: 137062

Fix up the patterns for SXTB, SXTH, UXTB, and UXTH so that they are correctly active without HasT2ExtractPack.  PR10611.

llvm-svn: 137061

llvm-svn: 137060

Add MCInstrAnalysis class. This allows the targets to specify own versions of MCInstrDescs functions.

- Add overrides for ARM.
- Teach llvm-objdump to use this instead of plain MCInstrDesc.

llvm-svn: 137059

- Indent simple loops
- Print unreachable blocks as .byte directives

llvm-svn: 137058

This way we can avoid printing unreachable code (data).

llvm-svn: 137057

llvm-svn: 137056

X86FloatingPoint keeps track of pending ST registers for an upcoming
inline asm instruction with fixed stack register constraints.  It does
this by remembering which FP register holds the value that should appear
at a fixed stack position for the inline asm.

When that FP register is killed before the inline asm, make sure to
duplicate it to a scratch register, so the ST register still has a live
FP reference.

This could happen when the same FP register was copied to two ST
registers, or when a spill instruction is inserted between the ST copy
and the inline asm.

This fixes PR10602.

llvm-svn: 137050

llvm-svn: 137042

llvm-svn: 137041

llvm-svn: 137040

with an opaque struct type, it doesn't make sense.  This should
resolve PR10473.

llvm-svn: 137028