llvm-svn: 62185

llvm-svn: 62184

llvm-svn: 62178

scheduling dependencies. Add assertion checks to help catch
this.

It appears the Mips target defaults to list-td, and it has a
regression test that uses a physreg dependence. Such code was
liable to be miscompiled, and now evokes an assertion failure.

llvm-svn: 62177

been modified, to avoid trouble in the (unlikely) scenario that
D is a reference to an element in one of those arrays.

llvm-svn: 62173

via two paths, process it once not twice, d'oh!
Analysis, testcase and original patch thanks to
Mon Ping Wang.

llvm-svn: 62169

was not being cleaned by ExpungeNode.

llvm-svn: 62167

llvm-svn: 62166

llvm-svn: 62151

FIX llvm-gcc bootstrap on x86_64 linux. If a virtual register is copied to a physical register, it's not necessarily defined by a copy. We have to watch out it doesn't clobber any sub-register that might be live during its live interval. If the live interval crosses a basic block, then it's not safe to check with the less conservative check (by scanning uses and defs) because it's possible a sub-register might be live out of the block.

llvm-svn: 62144

Use DebugInfo interface to lower dbg_* intrinsics.

llvm-svn: 62127

llvm-svn: 62125

llvm-svn: 62118

If multiple compile units are seen then emit them independently. In other words, do not force all DIEs into first, whatever it is, compile unit. 

Note, multiple compile unit support is not well tested (it did not work correctly until now anyway.)

llvm-svn: 62116

llvm-svn: 62115

llvm-svn: 62114

suggested by Chris.

llvm-svn: 62099

( May be this info should be directly handled by the dwarf writer ? )

llvm-svn: 62096

llvm-svn: 62092

llvm-svn: 62090

Fix PR3241: Currently EmitCopyFromReg emits a copy from the physical register to a virtual register unless it requires an expensive cross class copy. That means we are only treating "expensive to copy" register dependency as physical register dependency.
Also future proof the scheduler to handle "normal" physical register dependencies. The code is not exercised yet.

llvm-svn: 62074

llvm-svn: 62073

llvm-svn: 62036

llvm-svn: 62023

llvm-svn: 62022

llvm-svn: 62015

llvm-svn: 62005

llvm-svn: 61999

llvm-svn: 61991

Convert DwarfWriter into a pass.
Now Users request DwarfWriter through getAnalysisUsage() instead of creating an instance of DwarfWriter object directly.

llvm-svn: 61955

llvm-svn: 61950

llvm-svn: 61928

* Removed trailing whitespace

llvm-svn: 61927

* Removed trailing whitespace

llvm-svn: 61926

Again, shamelessly copied from MMI.

llvm-svn: 61912

This is a shameless copy of similar APIs from MachineModuleInfo. The copy from MMI will be deleted in near future.

llvm-svn: 61908

llvm-svn: 61891

The coalescer does not coalesce a virtual register to a physical register if any of the physical register's sub-register live intervals overlaps with the virtual register. This is overly conservative. It prevents a extract_subreg from being coalesced away:

v1024 = EDI  // not killed
      =
      = EDI

One possible solution is for the coalescer to examine the sub-register live intervals in the same manner as the physical register. Another possibility is to examine defs and uses (when needed) of sub-registers. Both solutions are too expensive. For now, look for "short virtual intervals" and scan instructions to look for conflict instead.

This is a small win on x86-64. e.g. It shaves 403.gcc by ~80 instructions.

llvm-svn: 61847

aggregate types. Don't increment the current index after reaching
the end of a struct, as it will already be pointing at
one-past-the end. This fixes PR3288.

llvm-svn: 61828

llvm-svn: 61822