llvm-svn: 117206

llvm-svn: 117202

weren't properly reflecting the OperandSize attribute
of the instruction leading to improper decoding of
certain instructions with the 66H prefix.  Also added
a test case for this.

llvm-svn: 117084

and %rcr_, leaving just %cr_ which is what people expect.
Updated the disassembler to support this unified register set.
Added a testcase to verify that the registers continue to be
decoded correctly.

llvm-svn: 103196

llvm-svn: 101538

argument that had to be between 0 and 7 to have any value,
firing an assert later in the AsmPrinter.  Now, the
disassembler rejects instructions with out-of-range values
for that immediate.

llvm-svn: 100694

return an error status in all failure cases, printing
messages to debugs() only when debugging is enabled.

llvm-svn: 100229

llvm-svn: 98819

because the Visual C++ build does not build .c files as C99

llvm-svn: 91935

with symbols in AuroraUX's global namespace.

llvm-svn: 91879

llvm-svn: 91878

X86 codegen that were causing circular symbol dependencies.

llvm-svn: 91871

llvm-svn: 91778

rename dprintf to dbgpritnf, in order to fix build with glibc (which already defines dprintf in stdio.h

llvm-svn: 91775

llvm-svn: 91754

incarnations), integrated into the MC framework.  

The disassembler is table-driven, using a custom TableGen backend to 
generate hierarchical tables optimized for fast decode.  The disassembler 
consumes MemoryObjects and produces arrays of MCInsts, adhering to the 
abstract base class MCDisassembler (llvm/MC/MCDisassembler.h).

The disassembler is documented in detail in

- lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime)
- utils/TableGen/DisassemblerEmitter.cpp (table emitter)

You can test the disassembler by running llvm-mc -disassemble for i386
or x86_64 targets.  Please let me know if you encounter any problems
with it.

llvm-svn: 91749