llvm-svn: 30708

can be used by MachineFunctionPasses who need this property.

llvm-svn: 30706

in a successor block for every block...resulting in some O(N^k) algorithm
which wasn't very good for performance. Calculating this information up
front and keeping it in a map made it much faster.

llvm-svn: 30697

llvm-svn: 30688

llvm-svn: 30686

llvm-svn: 30659

TargetRegisterClass specifies the desired spill alignment. However, it cannot be honored if stack alignment is smaller.

llvm-svn: 30648

with our English dead."

No! Really! Serious this time...It was how the vreg uses were being
adjusted that was causing hte Olden tests to fail. I corrected this and
the Olden and Regression tests all passed.

llvm-svn: 30644

This is a baby step towards fixing PR925.

llvm-svn: 30643

in olden among others.

llvm-svn: 30637

incoming stack. This allows X86 backend to use push / pop in epilogue /
prologue.

llvm-svn: 30636

llvm-svn: 30634

has disappeared.

llvm-svn: 30633

llvm-svn: 30628

a function, do it up front in linear time (going through all of the
instructions once). We create a map out of them. Then it's no problem to
use the information in it during elimination...

llvm-svn: 30624

llvm-svn: 30620

character, and ${:uid} which expands to a unique ID for the MachineInstr.
More can be added if/when they are needed.

llvm-svn: 30619

llvm-svn: 30616

llvm-svn: 30615

llvm-svn: 30613

llvm-svn: 30611

llvm-svn: 30610

llvm-svn: 30609

llvm-svn: 30606

because they have an aggressive linker that does dead code stripping.

llvm-svn: 30604

llvm-svn: 30601

llvm-svn: 30600

llvm-svn: 30597

llvm-svn: 30593

llvm-svn: 30590

llvm-svn: 30573

llvm-svn: 30570

llvm-svn: 30568

llvm-svn: 30561

llvm-svn: 30560

int %test(ulong *%tmp) {
        %tmp = load ulong* %tmp         ; <ulong> [#uses=1]
        %tmp.mask = shr ulong %tmp, ubyte 50            ; <ulong> [#uses=1]
        %tmp.mask = cast ulong %tmp.mask to ubyte
        %tmp2 = and ubyte %tmp.mask, 3          ; <ubyte> [#uses=1]
        %tmp2 = cast ubyte %tmp2 to int         ; <int> [#uses=1]
        ret int %tmp2
}

to:

_test:
        movl 4(%esp), %eax
        movl 4(%eax), %eax
        shrl $18, %eax
        andl $3, %eax
        ret

instead of:

_test:
        movl 4(%esp), %eax
        movl 4(%eax), %eax
        shrl $18, %eax
        # TRUNCATE movb %al, %al
        andb $3, %al
        movzbl %al, %eax
        ret

llvm-svn: 30558

the src/dst are not the same size.  This catches things like "truncate
32-bit X to 8 bits, then zext to 16", which happens a bit on X86.

llvm-svn: 30557

int test3(int a, int b) { return (a < 0) ? a : 0; }

to:

_test3:
        srawi r2, r3, 31
        and r3, r2, r3
        blr

instead of:

_test3:
        cmpwi cr0, r3, 1
        li r2, 0
        blt cr0, LBB2_2 ;entry
LBB2_1: ;entry
        mr r3, r2
LBB2_2: ;entry
        blr


This implements: PowerPC/select_lt0.ll:seli32_a_a

llvm-svn: 30517

llvm-svn: 30514

1. teach SimplifySetCC that '(srl (ctlz x), 5) == 0' is really x != 0.
2. Teach visitSELECT_CC to use SimplifySetCC instead of calling it and
   ignoring the result.  This allows us to compile:

bool %test(ulong %x) {
  %tmp = setlt ulong %x, 4294967296
  ret bool %tmp
}

to:

_test:
        cntlzw r2, r3
        cmplwi cr0, r3, 1
        srwi r2, r2, 5
        li r3, 0
        beq cr0, LBB1_2 ;
LBB1_1: ;
        mr r3, r2
LBB1_2: ;
        blr

instead of:

_test:
        addi r2, r3, -1
        cntlzw r2, r2
        cntlzw r3, r3
        srwi r2, r2, 5
        cmplwi cr0, r2, 0
        srwi r2, r3, 5
        li r3, 0
        bne cr0, LBB1_2 ;
LBB1_1: ;
        mr r3, r2
LBB1_2: ;
        blr

This isn't wonderful, but it's an improvement.

llvm-svn: 30513