There is no need to supply ModuleCU to addType() as a parameter.

llvm-svn: 90858

llvm-svn: 90857

llvm-svn: 90816

llvm-svn: 90815

llvm-svn: 90805

llvm-svn: 90804

llvm-svn: 90759

llvm-svn: 90744

Truncate the arguments of llvm.frameaddress / llvm.returnaddress intrinsics from i32 to platform's largest native type

llvm-svn: 90741

llvm-svn: 90669

llvm-svn: 90668

llvm-svn: 90653

And separate the directory and file name with a '/'.

llvm-svn: 90641

isn't cluttered with things like "Llabel47:Llabel48:  movq  (%rsi), %xmm3"

llvm-svn: 90638

llvm-svn: 90637

instead of SelectionDAGISel.cpp.

llvm-svn: 90636

MachineBasicBlock::canFallThrough(), which is target-independent and more
thorough.

llvm-svn: 90634

llvm-svn: 90633

and that Instruction only. Implement this by setting the "current debug position"
back to Unknown after processing each instruction.

llvm-svn: 90632

Don't print "SrcLine"; just print the filename and line number, which
is obvious enough and more informative.

llvm-svn: 90631

the column number if it is not known. Handle the case of a missing filename
better.

llvm-svn: 90630

llvm-svn: 90621

llvm-svn: 90617

Use new interfaces to print spill size.

llvm-svn: 90611

llvm-svn: 90575

llvm-svn: 90567

llvm-svn: 90566

architectures that LLVM targets, because they don't use this code.

llvm-svn: 90564

The coalescer is supposed to clean these up, but when setting up parameters
for a function call, there may be copies to physregs. If the defining
instruction has been LICM'ed far away, the coalescer won't touch it.

The register allocation hint does not always work - when the register
allocator is backtracking, it clears the hints.

This patch takes care of a few more cases that r90163 missed.

llvm-svn: 90502

- If the reaching definition is an undef and the use is a PHI, add the implicit_def to the end of the source block.
- When reaching value is replaced with another, update the cache as well.

llvm-svn: 90501

Insert composite type DIE into the map before processing type fields. This allows fields to find their context DIE from the map.

llvm-svn: 90498

llvm-svn: 90489

llvm-svn: 90488

Pointed out by Javier Martinez (who also provided a patch).  Since
this logic is not used on (for example) x86, I guess nobody noticed.
Tested by generating SHL, SRL, SRA on various choices of i64 for all
possible shift amounts, and comparing with gcc.  Since I did this on
x86-32, I had to force the use of ExpandShiftWithUnknownAmountBit.
What I'm saying here is that I don't have a testcase I can add to the
repository.

llvm-svn: 90482

llvm-svn: 90481

llvm-svn: 90474

llvm-svn: 90432

Don't pull vector sext through both hands of a logical operation, since doing so prevents the fusion of vector sext and setcc into vsetcc.
Add a testcase for the above transformation.
Fix a bogus use of APInt noticed while tracking this down.

llvm-svn: 90423

llvm-svn: 90415

llvm-svn: 90395