in multiple classes in the case that the classes are all
in subset/superset relations. This function is used by the
fast-isel emitter, which always wants the super-most set.

llvm-svn: 68957

namespace out of the isel emitters and into common code.

llvm-svn: 55079

Added abstract class MemSDNode for any Node that have an associated MemOperand
Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and
atomic.lss => atomic.load.sub

llvm-svn: 52706

and better control the abstraction.  Rename the type
to MVT.  To update out-of-tree patches, the main
thing to do is to rename MVT::ValueType to MVT, and
rewrite expressions like MVT::getSizeInBits(VT) in
the form VT.getSizeInBits().  Use VT.getSimpleVT()
to extract a MVT::SimpleValueType for use in switch
statements (you will get an assert failure if VT is
an extended value type - these shouldn't exist after
type legalization).
This results in a small speedup of codegen and no
new testsuite failures (x86-64 linux).

llvm-svn: 52044

CodeGenDAGPatterns, where it can be used in other tablegen backends.
This allows the inference to be done for DAGISelEmitter so that it
gets accurate mayLoad/mayStore/isSimpleLoad flags. 

This brings MemOperand functionality back to where it was before
48329. However, it doesn't solve the problem of anonymous patterns
which expand to code that does loads or stores.

llvm-svn: 49123

Allow ComplexExpressions in InstrInfo.td files to be slightly more... complex! ComplexExpressions can now have attributes which affect how TableGen interprets
the pattern when generating matchin code. 

The first (and currently, only) attribute causes the immediate parent node of the ComplexPattern operand to be passed into the matching code rather than the node at the root of the entire DAG containing the pattern.

llvm-svn: 46606

llvm-svn: 45822

Also, instructions with any nodes that are SDNPMayLoad also read memory.

llvm-svn: 45817

instead of "ISD::STORE".  This allows us to mark target-specific dag
nodes as storing (such as ppc byteswap stores).  This allows us to remove
more explicit isStore flags from the .td files.

Finally, add a warning for when a .td file contains an explicit 
isStore and tblgen is able to infer it.

llvm-svn: 45654

Split the pattern parsing code out from the dag isel emitter into it's own file.

No functionality change.

llvm-svn: 45632

llvm-svn: 45419

llvm-svn: 39828

being changed from an enum to an integer type, which can't have a custom
operator<< overload.

llvm-svn: 37412

llvm-svn: 30890

llvm-svn: 28376

represent pointer type.

llvm-svn: 28363

register classes.

llvm-svn: 28323

llvm-svn: 27188

llvm-svn: 25673

* Renamed MatchingNodes to RootNodes.

llvm-svn: 24636

matching code that is not currently auto-generated by tblgen, e.g. X86
addressing mode. Selection routines for complex patterns can return multiple operands, e.g. X86 addressing mode returns 4.

llvm-svn: 24634

llvm-svn: 24596

ValueType from the RegisterClass or Operands.  This step is necessary to
allow RegisterClasses to have multiple ValueTypes.

llvm-svn: 24555

llvm-svn: 23349

llvm-svn: 23282

llvm-svn: 21428

llvm-svn: 19758

and work better with VC++.  Patch contributed by Morten Ofstad!

llvm-svn: 17281

* Doxygen-ify some function comments

llvm-svn: 16974

llvm-svn: 15961

systematic.

llvm-svn: 15805

name of the generated asmwriter class, and the name of the format string.

llvm-svn: 15747

llvm-svn: 15390

an instance of the Instruction tablegen class.

llvm-svn: 15385

llvm-svn: 15382

llvm-svn: 9903

llvm-svn: 9305

llvm-svn: 8875

llvm-svn: 7833

llvm-svn: 7706