llvm-svn: 78015

Re-apply LiveInterval index dumping patch, with fixes suggested by Bill
and others.

llvm-svn: 78003

When LowerSubregsInstructionPass::LowerInsert eliminates an INSERT_SUBREG
instriction because it is an identity copy, make sure that the same registers
are alive before and after the elimination.

When the super-register is marked <undef> this requires inserting an
IMPLICIT_DEF instruction to make sure the super register is live.

Fix a related bug where a kill flag on the inserted sub-register was not transferred properly.

Finally, clear the undef flag in MachineInstr::addRegisterKilled. Undef implies dead and kill implies live, so they cant both be valid.

llvm-svn: 77989

llvm-svn: 77984

llvm-svn: 77982

llvm-svn: 77976

llvm-svn: 77974

llvm_report_error already prints "LLVM ERROR:". So stop reporting errors like "LLVM ERROR: llvm: error:" or "LLVM ERROR: ERROR:".

llvm-svn: 77971

Fix a coaelescer bug. If a copy val# is extended to eliminate a non-trivially coalesced copy, and the copy kills its source register. Trim the source register's live range to the last use if possible. This fixes up kill marker to make the scavenger happy.

llvm-svn: 77967

llvm-svn: 77931

llvm-svn: 77912

llvm-svn: 77906

Allow imp-def and imp-use of anything in the scavenger asserts, just like the machine code verifier.
Allow redefinition of a sub-register of a live register.

llvm-svn: 77904

support. This isn't immediately interesting, because Legalize
ends up lowering SELECT_CC if the target doesn't support it,
but this simplifies the process.

Also, if the SELECT_CC would be expanded in Legalize, it
can potentially end up with two copies of the condition
expression. By leaving it as SELECT+SETCC, the SELECT can be
expanded into two SELECTs that use a single SETCC.

The two comparisons are usually CSE'd, but depending on
when various expressions get legalized, the comparison
expression could involve calls to library functions, such
that the comparison expression may not be able to be CSE'd.
This will be needed by a future patch.

llvm-svn: 77896

Use of an <undef> register is treated like an <imp-use>. It is not an error to use a dead <undef> register.

llvm-svn: 77890

TLOF, unifying all the dwarf targets at the same time.

llvm-svn: 77889

llvm-svn: 77888

defaults to being ELF.

llvm-svn: 77866

behavior of the LSDA section instead of on some random target hook that
needs to be kept in synch with other points of truth.

llvm-svn: 77855

getLSDASection() to be more specific.  This makes it pretty obvious
that the ELF LSDA section is being specified wrong in PIC mode.  We're
probably getting a lot of startup-time relocations to a readonly page,
which is expensive and bad.

Someone who cares about ELF C++ should investigate this.

llvm-svn: 77847

TAI.

llvm-svn: 77842

llvm-svn: 77834

compute it based on what it knows.  As part of this, rename getSectionForMergeableConstant
to getSectionForConstant because it works for non-mergable constants also.

The only functionality change from this is that Xcore will start dropping
its jump tables into readonly section instead of data section in -static mode.
This should be fine as the linker resolves the relocations.  If this is a
problem, let me know and we'll come up with another solution.

llvm-svn: 77833

llvm-svn: 77821

to:

.quad X

even on a 32-bit system, where X is not 64-bits.  There isn't much that
we can do here, so we just print:

.quad	((X) & 4294967295)

instead.

llvm-svn: 77818

should have no state that is specific to particular globals in the
section.  In this case, it means the removal of the "isWeak" and
"ExplicitSection" bits.  MCSection uses the new form of SectionKind.

To handle isWeak, I introduced a new SectionInfo class, which is
SectionKind + isWeak, and it is used by the part of the code generator
that does classification of a specific global.

The ExplicitSection disappears.  It is moved onto MCSection as a new
"IsDirective" bit.  Since the Name of a section is either a section
or directive, it makes sense to keep this bit in MCSection.  Ultimately
the creator of MCSection should canonicalize (e.g.) .text to whatever
the actual section is.

llvm-svn: 77803

actually characters.

llvm-svn: 77794

that it released its allocated memory.

llvm-svn: 77775

llvm-svn: 77774

llvm-svn: 77769

as it is now a MachineFunctionPass, and MachineFunctionPass now handles
this.

llvm-svn: 77760

MachineLoopInfo.

llc now runs MachineLoopInfo and MachineDominatorTree only twice, instead
of three times.

llvm-svn: 77759

llvm-svn: 77754

to the MachineFunction.

llvm-svn: 77753

llvm-svn: 77752

in SelectionDAGLowering::visitTargetIntrinsic.

This removes a bit of special-case code for vector types.  After staring
at it for a while, I managed to convince myself that it is not necessary.
The only case where TLI.getValueType() differs from MVT::getMVT is for iPTR,
so this code could potentially make a difference for a vector of pointers.
But, it looks like that is not supported.  Calling TLI.getValueType() on
a vector of pointers leads to the following sequence of calls:

TargetLowering::getValueType
MVT::getMVT
MVT::getVectorVT(iPTR, num elements)
MVT::getExtendedVectorVT
MVT::getTypeForMVT for iPTR
assertion fails "Type is not extended!"

So, unless I'm really missing something, this bit of code is irrelevant to
the current version of LLVM, which is consistent with the fact that I don't
see this code in other similar places.

llvm-svn: 77747

need the PreferredEHDataFormat hook, but I have yet-more refactoring to
do before I can zap it.

llvm-svn: 77742

have no functionality change.

llvm-svn: 77741

Simplify operand padding by keying off tabs in the asm stream.  If
padding is disabled, tabs get replaced by spaces except in the case of
the first operand, where the tab is output to line up the operands after
the mnemonics.

Add some better comments and eliminate redundant code.

Fix some testcases to not assume tabs.

llvm-svn: 77740

thing is #if0'd out anyway.  Just simplify the code by reducing the interface.
Not deleting this is essential for Bill's continuing happiness.

llvm-svn: 77736