llvm-svn: 78175

llvm-svn: 78169

MMX arguments. This fixes PR4684.

llvm-svn: 78163

them in the verifier.

llvm-svn: 78160

llvm-svn: 78157

getKindForGlobal.

llvm-svn: 78156

We can not simply apply ZIV testing to the pointer offsets, as this
would incorrectly return independence for e.g. (GEP x,0,i; GEP x,1,-i).

llvm-svn: 78155

llvm-svn: 78154

llvm-svn: 78151

llvm-svn: 78146

llvm-svn: 78145

llvm-svn: 78144

Instead of awkwardly encoding calling-convention information with ISD::CALL,
ISD::FORMAL_ARGUMENTS, ISD::RET, and ISD::ARG_FLAGS nodes, TargetLowering
provides three virtual functions for targets to override:
LowerFormalArguments, LowerCall, and LowerRet, which replace the custom
lowering done on the special nodes. They provide the same information, but
in a more immediately usable format.

This also reworks much of the target-independent tail call logic. The
decision of whether or not to perform a tail call is now cleanly split
between target-independent portions, and the target dependent portion
in IsEligibleForTailCallOptimization.

This also synchronizes all in-tree targets, to help enable future
refactoring and feature work.

llvm-svn: 78142

llvm-svn: 78141

llvm-svn: 78139

llvm-svn: 78138

calls were originally put in place because errs() at one time was
not unbuffered, and these print routines are commonly used with errs()
for debugging. However, errs() is now properly unbuffered, so the
flush calls are no longer needed. This significantly reduces the
number of write(2) calls for regular asm printing when there are many
small functions.

llvm-svn: 78137

Get rid of yesterday's code to fix the register usage during isel.
Select the new DAG nodes to machine instructions.  The new pre-alloc pass
to choose adjacent registers for these results is not done, so the
results of this will generally not assemble yet.

llvm-svn: 78136

llvm-svn: 78135

fork call. This eliminates a need for <iostream>. Also remove
needless fsync calls.

llvm-svn: 78131

llvm-svn: 78130

for ELF to work.  
2) RIP addressing: Use SIB bytes for absolute relocations where RegBase=0, 
IndexReg=0.
3) The JIT can get the real address of cstpools and jmptables during
code emission, fix that for object code emission

llvm-svn: 78129

Add a comment explaining why.

llvm-svn: 78128

address from the reverse mapping, and add a test that this works now.

llvm-svn: 78127

llvm-svn: 78126

llvm-svn: 78125

Begin the process of privatizing the type uniquing tables.  No API changes yet, but there will be in the near future.

llvm-svn: 78122

matches what the comment says, and it avoids spurious BitCast
instructions for Argument values.

llvm-svn: 78121

and 126 if it is not executable.

llvm-svn: 78120

llvm-svn: 78119

llvm-svn: 78118

llvm-svn: 78116

Factor some of the constants+context related code out into a separate header, to make LLVMContextImpl.h
not hideous.  Also, fix some MSVC compile errors.

llvm-svn: 78115

For other VLDn and VSTn operations, we need to list the multiple registers
explicitly anyway, so there's no point in special-casing this one usage.

llvm-svn: 78109

This fixes PR4528.

llvm-svn: 78107

Imp-def is *not* allowed to redefine a live register.
Imp-use is *not* allowed to use a dead register.

llvm-svn: 78106

llvm-svn: 78105

llvm-svn: 78104

still get "intel syntax" instructions from llc with  
-x86-asm-syntax=intel

llvm-svn: 78103

llvm-svn: 78101