- Feb 23, 2012
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Douglas Gregor authored
llvm-svn: 151264
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Douglas Gregor authored
llvm-svn: 151263
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Benjamin Kramer authored
llvm-svn: 151262
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Howard Hinnant authored
llvm-svn: 151261
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Jakob Stoklund Olesen authored
llvm-svn: 151260
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Douglas Gregor authored
isTrivial() call. llvm-svn: 151259
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Benjamin Kramer authored
Replace some DenseSets with SmallPtrSets. Apart from the "small" optimization, the current implementation is also a denser. llvm-svn: 151257
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Howard Hinnant authored
I had originally made the handler function pointers a static internal detail, not accessible to the outside world. I did this because they must be accessed in a thread-safe manner, and the library provides thread-safe getters and setters for these. However I am at least temporarily making them public and giving them the Apple-extension names. In the future these may disappear again, and I think that would probably be a good idea. llvm-svn: 151256
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Benjamin Kramer authored
Unique CXXBasePath decls with the SmallVector/pod_sort/std::unique idiom instead of employing a wasteful std::set. llvm-svn: 151255
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Benjamin Kramer authored
llvm-svn: 151254
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Benjamin Kramer authored
llvm-svn: 151252
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Duncan Sands authored
llvm-svn: 151251
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Anton Korobeynikov authored
of instantiated C++ templates. Patch by Kristof Beyls! llvm-svn: 151250
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Jay Foad authored
llvm-svn: 151249
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Jay Foad authored
llvm-svn: 151248
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Jay Foad authored
it with memcpy. This also fixes a problem on big-endian hosts, where addUnaligned would return different results depending on the alignment of the data. llvm-svn: 151247
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Craig Topper authored
llvm-svn: 151246
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Richard Smith authored
forget the vptrs. llvm-svn: 151245
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Duncan Sands authored
used if IsInDevelopmentTree is 'true'. But it doesn't, so help it out. llvm-svn: 151244
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Duncan Sands authored
llvm-svn: 151243
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Duncan Sands authored
returns 'true' and emits a warning. Help it out. llvm-svn: 151242
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Douglas Gregor authored
llvm-svn: 151241
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Douglas Gregor authored
compiler support for the std::is_trivially_assignable library type trait. llvm-svn: 151240
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Douglas Gregor authored
llvm-svn: 151239
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Rafael Espindola authored
llvm-svn: 151238
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Rafael Espindola authored
* Handle some situations where we should never make a decl more visible, even when merging in an explicit visibility. * Handle attributes in members of classes that are explicitly specialized. Thanks Nico for the report and testing, Eric for the initial review, and dgregor for the awesome test27 :-) llvm-svn: 151236
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Eric Christopher authored
llvm-svn: 151235
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Eric Christopher authored
llvm-svn: 151234
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Andrew Trick authored
Ignore undef uses completely. Use a more explicit SlotIndex API. Add more explicit comments. llvm-svn: 151233
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Douglas Gregor authored
- Apparently, SVN is yellow - Note that initializer lists are "in progress" llvm-svn: 151232
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Douglas Gregor authored
llvm-svn: 151231
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Evan Cheng authored
of x are zero. This optimizes rev + lsr 16 to rev16. rdar://10750814 llvm-svn: 151230
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Eli Friedman authored
Try to handle qualifiers more consistently for array InitListExprs. Fixes <rdar://problem/10907510>, and makes the ASTs a bit more self-consistent. (I've chosen to keep the qualifiers, but it isn't a strong preference; if anyone prefers removing them, please yell.) llvm-svn: 151229
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Andrew Trick authored
Added array subscript to SparseSet for convenience. Slight reorg to make it easier to manage the def/use sets. llvm-svn: 151228
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Richard Smith authored
C++11, and with braced-init-list initializers in conditions. This exposed an ambiguity with enum underlying types versus bitfields, which we resolve by treating 'enum E : T {' as always defining an enumeration (even if it would only successfully parse as a bitfield). This appears to be g++ compatible. llvm-svn: 151227
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Jakob Stoklund Olesen authored
llvm-svn: 151226
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Aaron Ballman authored
llvm-svn: 151225
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Evan Cheng authored
value is zero. Instead of a cmov + op, issue an conditional op instead. e.g. cmp r9, r4 mov r4, #0 moveq r4, #1 orr lr, lr, r4 should be: cmp r9, r4 orreq lr, lr, #1 That is, optimize (or x, (cmov 0, y, cond)) to (or.cond x, y). Similarly extend this to xor as well as (and x, (cmov -1, y, cond)) => (and.cond x, y). It's possible to extend this to ADD and SUB but I don't think they are common. rdar://8659097 llvm-svn: 151224
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Jakob Stoklund Olesen authored
llvm-svn: 151223
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Jakob Stoklund Olesen authored
The bulk masking operations from register mask operands don't account for reserved registers. llvm-svn: 151222
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