Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after
all the kinks are worked out.

llvm-svn: 42285

have situations where an SSE instruction turns into
multiple blocks, with the live range of an x87
register crossing them.  To do this correctly make
sure we examine all blocks when inserting
FP_REG_KILL.  PR 1697.  (This was exposed by my
fix for PR 1681, but the same thing could happen
mixing x87 long double with SSE.)

llvm-svn: 42281

instead of ISD::LABEL with a manual .debug_line entry when the assembler
supports .file and .loc directives.

llvm-svn: 42278

llvm-svn: 42268

code that creates the label too.

llvm-svn: 42265

asm to die with:

ScheduleDAG.cpp:269: failed assertion `false && "Couldn't find the register class"'

instead of:
failed assertion `RegMap->getRegClass(VReg) == RC && "Register class of operand and regclass of use don't agree!"'

yay.

llvm-svn: 42259

keep f32 in SSE registers and f64 in x87.  This
is effectively a new codegen mode.
Change addLegalFPImmediate to permit float and
double variants to do different things.
Adjust callers.

llvm-svn: 42246

Implement calls to functions with byval arguments on X86

llvm-svn: 42192

llvm-svn: 42189

llvm-svn: 42182

llvm-svn: 42162

llvm-svn: 42159

llvm-svn: 42155

llvm-svn: 42147

llvm-svn: 42124

tables so that they are eligible for reload/remat folding. And add
entries for JMP and CALL.

llvm-svn: 42094

and storeRegToStackSlot.  Evan and I concluded this
should never be needed and it appears to be true.
(It if is needed, adjustment would be needed for
long double to work.)

llvm-svn: 42049

llvm-svn: 42037

can terminate a block with no fall-through.

llvm-svn: 42029

llvm-svn: 42027

64-bit) can use test instead of cmp with an immediate.

llvm-svn: 42026

previously only done for 32-bit and smaller operands.

llvm-svn: 42024

match the conditional that turns on exception handling emittion in the asm
printer.

llvm-svn: 42008

supports it. This solves this error on the Darwin x86-64 platform:

$ cat testcase.ii
struct A {
  A();
};

A *bork() {
  return new A;
}
$ llvm-g++ -arch x86_64 -c testcase.ii
/var/tmp//cc3U8fd8.s:52:unknown section type: non_lazy_symbol_pointers
/var/tmp//cc3U8fd8.s:52:Rest of line ignored. 1st junk character valued 76 (L).
/var/tmp//cc3U8fd8.s:53:Unknown pseudo-op: .indirect_symbol
/var/tmp//cc3U8fd8.s:53:Rest of line ignored. 1st junk character valued 95 (_).

llvm-svn: 41999

llvm-svn: 41975

double from some of the many places in the optimizers
it appears, and do something reasonable with x86
long double.
Make APInt::dump() public, remove newline, use it to
dump ConstantSDNode's.
Allow APFloats in FoldingSet.
Expand X86 backend handling of long doubles (conversions
to/from int, mostly).

llvm-svn: 41967

llvm-svn: 41962

isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.

llvm-svn: 41958

llvm-svn: 41953

llvm-svn: 41863

llvm-svn: 41862

access to bits).  Use them in place of float and
double interfaces where appropriate.
First bits of x86 long double constants handling 
(untested, probably does not work).

llvm-svn: 41858

information for EH.

llvm-svn: 41852

init_trampoline.  There is now only one
trampoline intrinsic.

llvm-svn: 41841

llvm-svn: 41840

that global stub instead of doing the ".set" thingy we were doing before.

llvm-svn: 41838

llvm-svn: 41810

llvm-svn: 41808

instruction. These are implemented with xor which will modify the conditional
code. They should be rematerialized as move instructions.

llvm-svn: 41802

registers. The scheduler is now responsible for emitting them.

llvm-svn: 41781