loads properly.  We miscompiled the testcase into:

_test:                                  ## @test
	movl	$128, (%rdi)
	movzbl	1(%rdi), %eax
	ret

Now we get a proper:

_test:                                  ## @test
	movl	$128, (%rdi)
	movsbl	(%rdi), %eax
	movzbl	%ah, %eax
	ret

This fixes PR8757.

llvm-svn: 122392

unhanded cases faster and simplify code.

llvm-svn: 122391

llvm-svn: 122389

llvm-svn: 122385

llvm-svn: 122384

llvm-svn: 122381

llvm-svn: 122379

I still think that LVI should be handling this, but that capability is some ways off in the future,
and this matters for some significant benchmarks.

llvm-svn: 122378

types, but they're just getting converted to unsigned anyway, so cast first
(and ask questions later).

llvm-svn: 122377

llvm-svn: 122371

the same physical register. Simplifies the fix from the previous
checkin r122211.

llvm-svn: 122370

llvm-svn: 122368

the shift type was needed one place, the shift count
type another.  The transform in 123555 had the same
problem.

llvm-svn: 122366

(add Y, (sete  X, 0)) -> cmp X, 1; adc  0, Y
(add Y, (setne X, 0)) -> cmp X, 1; sbb -1, Y
(sub (sete  X, 0), Y) -> cmp X, 1; sbb  0, Y
(sub (setne X, 0), Y) -> cmp X, 1; adc -1, Y

for
  unsigned foo(unsigned a, unsigned b) {
    if (a == 0) b++;
    return b;
  }
we now get:
  foo:
    cmpl  $1, %edi
    movl  %esi, %eax
    adcl  $0, %eax
    ret
instead of:
  foo:
    testl %edi, %edi
    sete  %al
    movzbl  %al, %eax
    addl  %esi, %eax
    ret

llvm-svn: 122364

llvm-svn: 122362

llvm-svn: 122360

the folding it can.

llvm-svn: 122359

are not actually relaxed. For example, a section with only alignments will never
needs relaxation.

llvm-svn: 122356

llvm-svn: 122355

count operand.  These should be the same but apparently are
not always, and this is cleaner anyway.  This improves the
code in an existing test.

llvm-svn: 122354

llvm-svn: 122353

llvm-svn: 122349

Revert 122341.  It breaks some darwin tests.

llvm-svn: 122346

llvm-svn: 122345

visit instructions before their uses, since InstructionSimplify does a
better job in that case.  All this prompted by Frits van Bommel.

llvm-svn: 122343

llvm-svn: 122342

Fix PR 8199.  This patch prepends the build tool dir to LLVM programs
being tested.  This ensures that we test the tools just built and not
some random tools that might happen to be in the user's PATH.  This
makes LLVM testing much more stable and predictable.

llvm-svn: 122341

llvm-svn: 122337

not very important since the pass is only used for testing, but it does make
it more realistic.  Suggested by Frits van Bommel.

llvm-svn: 122336

type.

llvm-svn: 122334

llvm-svn: 122333

not assume this (for example in case more transforms get added below
it).  Suggested by Frits van Bommel.

llvm-svn: 122332

llvm-svn: 122331

plenty left though!), in particular for multiplication.

llvm-svn: 122330

llvm-svn: 122329

quite often, but don't make much difference in practice presumably because
instcombine also knows them and more.

llvm-svn: 122328

No functionality change.

llvm-svn: 122327

a couple of existing transforms.  This fires surprisingly often, for
example when compiling gcc "(X+(-1))+1->X" fires quite a lot as well
as various "and" simplifications (usually with a phi node operand).
Most of the time this doesn't make a real difference since the same
thing would have been done elsewhere anyway, eg: by instcombine, but
there are a few places where this results in simplifications that we
were not doing before.

llvm-svn: 122326

of the problems with my last attempt were in the updating of LiveIntervals
rather than the coalescing itself. Therefore, I decided to get that right first
by essentially reimplementing the existing PHIElimination using LiveIntervals.

It works correctly, with only a few tests failing (which may not be legitimate
failures) and no new verifier failures (at least as far as I can tell, I didn't
count the number per file).

llvm-svn: 122321

Type legalization splits up i64 values into pairs of i32 values, which leads
to poor quality code when inserting or extracting i64 vector elements.
If the vector element is loaded or stored, it can be treated as an f64 value
and loaded or stored directly from a VPR register.  Use the pre-legalization
DAG combiner to cast those vector elements to f64 types so that the type
legalizer won't mess them up.  Radar 8755338.

llvm-svn: 122319