- Sep 28, 2011
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Akira Hatanaka authored
llvm-svn: 140704
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Akira Hatanaka authored
llvm-svn: 140703
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Andrew Trick authored
Handle general Add expressions to avoid leaving around redundant 32-bit IVs. llvm-svn: 140701
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Justin Holewinski authored
Get rid of some of the no-longer-needed parts of PTXAsmPrinter. llvm-svn: 140698
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Justin Holewinski authored
Lay some groundwork for converting to MC-based asm printer. This is the first of probably many patches to bring the back-end back up-to-date with all of the recent MC changes. llvm-svn: 140697
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James Molloy authored
Build on previous patches to successfully distinguish between an M-series and A/R-series MSR and MRS instruction. These take different mask names and have a *slightly* different opcode format. Add decoder and disassembler tests. Improvement on the previous patch - successfully distinguish between valid v6m and v7m masks (one is a subset of the other). The patch had to be edited slightly to apply to ToT. llvm-svn: 140696
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Duncan Sands authored
when there is both a catch and a cleanup. Correct the comment. llvm-svn: 140686
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Benjamin Kramer authored
llvm-svn: 140680
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Benjamin Kramer authored
The copies caused use-after-free bugs on std::string implementations without COW (i.e. anything but libstdc++) llvm-svn: 140679
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Bill Wendling authored
llvm-svn: 140678
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Bill Wendling authored
llvm-svn: 140677
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Bill Wendling authored
This intrinsic is used to pass the index of the function context to the back-end for further processing. The back-end is in charge of filling in the rest of the entries. llvm-svn: 140676
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Bill Wendling authored
The DWARF exception pass uses the call site information, which is set up here. A pre-RA pass is too late for it to use this information. So create and setup the function context here, and then insert the call site values here (and map the call sites for the DWARF EH pass). This is simpler than the original pass, and doesn't make the CFG lose its SSA-ness. It's a win-win-win-win-lose-win-win situation. llvm-svn: 140675
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Bill Wendling authored
We may need an SjLj EH preparation pass for some call site information, at least in the short term. llvm-svn: 140674
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Andrew Trick authored
llvm-svn: 140670
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Eli Friedman authored
PR10628: Fix getModRefInfo so it queries the underlying alias() implementation correctly while checking nocapture calls. llvm-svn: 140666
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Jakob Stoklund Olesen authored
No functional change intended. llvm-svn: 140664
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Jakob Stoklund Olesen authored
I'll clean up the source in the next commit. llvm-svn: 140663
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Akira Hatanaka authored
llvm-svn: 140661
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Jakob Stoklund Olesen authored
This also enables domain swizzling for AVX code which required a few trivial test changes. The pass will be moved to lib/CodeGen shortly. llvm-svn: 140659
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Ted Kremenek authored
llvm-svn: 140655
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Jakob Stoklund Olesen authored
llvm-svn: 140653
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Jakob Stoklund Olesen authored
I am going to unify the SSEDomainFix and NEONMoveFix passes into a single target independent pass. They are essentially doing the same thing. llvm-svn: 140652
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Jim Grosbach authored
Add inst alias to handle these assembly forms. Add tests, too. rdar://10178799 llvm-svn: 140647
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Bill Wendling authored
current IR-level pass. The old SjLj EH pass has some problems, especially with the new EH model. Most significantly, it violates some of the new restrictions the new model has. For instance, the 'dispatch' table wants to jump to the landing pad, but we cannot allow that because only an invoke's unwind edge can jump to a landing pad. This requires us to mangle the code something awful. In addition, we need to keep the now dead landingpad instructions around instead of CSE'ing them because the DWARF emitter uses that information (they are dead because no control flow edge will execute them - the control flow edge from an invoke's unwind is superceded by the edge coming from the dispatch). Basically, this pass belongs not at the IR level where SSA is king, but at the code-gen level, where we have more flexibility. llvm-svn: 140646
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Akira Hatanaka authored
of the instruction definitions using Pat<>. llvm-svn: 140644
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- Sep 27, 2011
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Cameron Zwarich authored
a suboptimal schedule. llvm-svn: 140643
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Jim Grosbach authored
Naming conventions consistency. No functional change. llvm-svn: 140636
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Benjamin Kramer authored
Stop emitting instructions with the name "tmp" they eat up memory and have to be uniqued, without any benefit. If someone prefers %tmp42 to %42, run instnamer. llvm-svn: 140634
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Chad Rosier authored
require special case handling. rdar://10117377 llvm-svn: 140629
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Michael J. Spencer authored
llvm-svn: 140626
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Duncan Sands authored
llvm-svn: 140625
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Justin Holewinski authored
llvm-svn: 140624
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Justin Holewinski authored
a couple of outstanding issues with frame objects occuring as instruction operands. llvm-svn: 140616
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Jakob Stoklund Olesen authored
llvm-svn: 140615
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Akira Hatanaka authored
Return numbers of 64-bit registers. llvm-svn: 140609
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Akira Hatanaka authored
llvm-svn: 140607
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Duncan Sands authored
llvm-svn: 140606
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Nadav Rotem authored
Add a new method: getAnyExtOrTrunc and use it to replace the manual check. llvm-svn: 140603
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Nadav Rotem authored
while the decision is to bit-pack small values. llvm-svn: 140601
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