The registers are placed into the saved registers list in the reverse order,
which is why the original loop was written to loop backwards.

llvm-svn: 148064

Added FPOW, FEXP, FLOG to PromoteNode so that custom actions can be set to Promote for those operations.

Sorry, no test case yet

llvm-svn: 148050

 lc: X86ISelLowering.cpp:6480: llvm::SDValue llvm::X86TargetLowering::LowerVECTOR_SHUFFLE(llvm::SDValue, llvm::SelectionDAG&) const: Assertion `V1.getOpcode() != ISD::UNDEF&&  "Op 1 of shuffle should not be undef"' failed.
Added a test.

llvm-svn: 148044

killed registers are needed below the insertion point, then unset the kill
marker.

Sorry I'm not able to find a reduced test case.

rdar://10660944

llvm-svn: 148043

Patch by Brian Anderson.

llvm-svn: 148042

This patch uses tcb_spare field in the tcb structure to store info.
Patch by Jyun-Yan You.

llvm-svn: 148041

Uses the pvArbitrary slot of the TIB, which is reserved for applications. We
only support frames with a static size.

llvm-svn: 148040

llvm-svn: 148039

llvm-svn: 148034

llvm-svn: 148033

We are using one parser to parse att as well as intel style syntax.

llvm-svn: 148032

llvm-svn: 148031

Restore the (obviously wrong) behavior from before r147938 without relying on
undefined behavior. Add a fat FIXME note.

This should fix nightly tester failures.

llvm-svn: 148030

Fix a bug in the AVX 256-bit shuffle code in cases where the splat element is on the boundary of two 128-bit vectors.
The attached testcase was stuck in an endless loop.

llvm-svn: 148027

X86: Generalize the x << (y & const) optimization to also catch masks with more set bits set than 31 or 63.

llvm-svn: 148024

llvm-svn: 148014

In att style asm syntax memory operand size is derived from suffix attached with mnemonic.  In intel style asm syntax it is part of memory operand hence predicate method check is required to select appropriate instruction.

llvm-svn: 148006

need to make a deep copy of each of the std::maps. Use a std::map of the
std::map instead. This improves the compile time of sqlite3 by ~2%.

llvm-svn: 148003

This is a work in progress.

llvm-svn: 148002

same pattern. We already had this pattern is a few places, but others
tried to make a rough approximation of an actual DAG structure. As not
everywhere went to this trouble, nothing could rely on this being done.
In fact, I've checked all references to these node Ids, and the ones
that are using the topo-sort properties are actually satisfied with
a strict-weak-ordering. The requirement appears to be that Use >= Def.

I've added a big blurb of comments to this bit of the transform to
clarify why the order is so important for the next reader of the code.

I'm starting with this change as it is very small, and trivially
reverted if something breaks or the >= above really does need to be >.
If that proves the case, we can hide the problem by reverting this
patch, but the problem exists elsewhere as well, and so a more
comprehensive solution will be needed.

llvm-svn: 148001

llvm-svn: 147980

llvm-svn: 147979

This appears to improve sqlite3's compile time by ~2%.

llvm-svn: 147978

This helper method is too simplistic for RAGreedy.

llvm-svn: 147976

llvm-svn: 147975

No functional change.

llvm-svn: 147972

Re-fix the issue Bill fixed in r147899 in a slightly different way, which doesn't abuse the semantics of linker_private.  We don't really want to merge any string constant with a weak_odr global.

llvm-svn: 147971

llvm-svn: 147970

llvm-svn: 147969

Previously let the JITEmitter do it. That's rather odd, and doesn't play nice
with the MCJIT, so move the (trivial) logic up.

llvm-svn: 147967

llvm-svn: 147966

llvm-svn: 147965

When we load the v12i32 type, the GenWidenVectorLoads method generates two loads: v8i32 and v4i32 
and attempts to use CONCAT_VECTORS to join them. In this fix I concat undef values to widen 
the smaller value. The test "widen_load-2.ll" also exposes this bug on AVX.

llvm-svn: 147964

llvm-svn: 147961

This uses TLS slot 90, which actually belongs to JavaScriptCore. We only support
frames with static size
Patch by Brian Anderson.

llvm-svn: 147960

Patch by Brian Anderson.

llvm-svn: 147959

Patch by Brian Anderson.

llvm-svn: 147958

hoped this would revive one of the llvm-gcc selfhost build bots, but it
didn't so it doesn't appear that my transform is the culprit.

If anyone else is seeing failures, please let me know!

llvm-svn: 147957

This is a comparison of two addresses, and GCC does the comparison unsigned.

Patch by Brian Anderson.

llvm-svn: 147954

[asan] extend the workaround for http://llvm.org/bugs/show_bug.cgi?id=11395: don't instrument the function at all on x86_32 if it has a large asm blob

llvm-svn: 147953