llvm-svn: 117069

llvm-svn: 117067

llvm-svn: 117064

llvm-svn: 117059

llvm-svn: 117047

llvm-svn: 117040

llvm-svn: 117039

from losing the variant when producing a relocation on an alias.

llvm-svn: 117037

sense, when the instruction takes the 16-bit ax register or m16 memory
location.  These changes to llvm-mc matches what the darwin assembler allows
for these instructions.  Also added the missing flex (without the wait prefix)
and ud2a as an alias to ud2 (still to add ud2b).

llvm-svn: 117031

llvm-svn: 117002

llvm-svn: 116993

llvm-svn: 116992

compiles on OS X. I'll ensure that it builds on a linux machine before committing
again.

llvm-svn: 116991

llvm-svn: 116987

    1. A delay slot filler that searches for valid instructions
       to fill the delay slot with. Previously NOPs would always
       be inserted into delay slots.
    2. Support for MC based instruction printer added.
    3. Support for MC based machine code generation and ELF
       file generation. ELF file generation does not yet
       completely work as much of the ELF support infrastructure
       is still x86/x86-64 specific.
    4. General clean up of the MBlaze backend code. Much of the
       tablegen code has been cleanup and simplified.

Bug Fixes:
    1. Removed duplicate periods from subtarget feature descriptions.
    2. Many of the instructions had bad machine code information
       in the tablegen files. Much of this has been fixed.

llvm-svn: 116986

llvm-svn: 116983

llvm-svn: 116981

extension register.

llvm-svn: 116970

registers.

llvm-svn: 116961

llvm-svn: 116957

- Initial register pressure in the loop should be all the live defs into the
  loop. Not just those from loop preheader which is often empty.
- When an instruction is hoisted, update register pressure from loop preheader
  to the original BB.
- Treat only use of a virtual register as kill since the code is still SSA.

llvm-svn: 116956

llvm-svn: 116955

llvm-svn: 116953

llvm-svn: 116932

integers by default, and remove the controlling flag, now
that LICM will hoist such vdup's.  8003375.

llvm-svn: 116852

erased the instruction during LICM so UpdateRegPressureAfter() should not
reference it afterwards.

llvm-svn: 116845

The failures in r116753 r116756 were caused by a python issue -
Python likes to append 'L' suffix to stringified numbers if the number
is larger than a machine int. Unfortunately, this causes a divergence of
behavior between 32 and 64 bit python versions.

I re-crafted elf-dump/common_dump to take care of these issues by:

1. always printing 0x (makes for easy sed/regex)
2. always print fixed length (exactly 2 + numBits/4 digits long)
   by mod ((2^numBits) - 1)
3. left-padded with '0'

There is a residual common routine that is also used by
macho-dump (dataToHex) , so I left the 'section_data' test values alone.

llvm-svn: 116823

is", which breaks some nightly tests.

llvm-svn: 116816

Fixes PR8389.

llvm-svn: 116812

llvm-svn: 116806

llvm-svn: 116788

  "long latency" enough to hoist even if it may increase spilling. Reloading
  a value from spill slot is often cheaper than performing an expensive
  computation in the loop. For X86, that means machine LICM will hoist
  SQRT, DIV, etc. ARM will be somewhat aggressive with VFP and NEON
  instructions.
- Enable register pressure aware machine LICM by default.

llvm-svn: 116781

llvm-svn: 116777

llvm-svn: 116776

word forms and suffixed versions to match the darwin assembler in 32-bit and
64-bit modes.  This is again for use just with assembly source for llvm-mc .

llvm-svn: 116773

llvm-svn: 116762

llvm-svn: 116756

Also updated tests. 

llvm-svn: 116753

TBAA information to AliasAnalysis.

llvm-svn: 116751

llvm-svn: 116745