into SimplifySetCC which gets called elsewhere.

llvm-svn: 63583

llvm-svn: 63582

llvm-svn: 63580

default to -march=x86-64 on 64-bit hosts.

llvm-svn: 63579

information. This eliminates the need for the Flags field in MemSDNode,
so this makes LoadSDNode and StoreSDNode smaller. Also, it makes
FoldingSetNodeIDs for loads and stores two AddIntegers smaller.

llvm-svn: 63577

SSE2, however it's possible to disable SSE2, and the subtarget support
code thinks that if 64-bit implies SSE2 and SSE2 is disabled then
64-bit should also be disabled. Instead, just mark all the 64-bit
subtargets as explicitly supporting SSE2.

Also, move the code that makes -march=x86-64 enable 64-bit support by
default to only apply when there is no explicit subtarget. If you
need to specify a subtarget and you want 64-bit code, you'll need to
select a subtarget that supports 64-bit code.

llvm-svn: 63575

llvm-svn: 63574

llvm-svn: 63572

llvm-svn: 63561

except LegalizeOp itself.

llvm-svn: 63560

option to make the -fno- form on the option.  We also document the new
form in the CommandLine documentation.

llvm-svn: 63559

Live interval reconstruction needs to account for this, and scour its maps to
prevent dangling references.

llvm-svn: 63558

among others.

llvm-svn: 63555

Add an assert to check HasX86_64 status.

llvm-svn: 63552

llvm-svn: 63548

llvm-svn: 63545

llvm-svn: 63544

llvm-svn: 63543

llvm-svn: 63542

llvm-svn: 63540

- Add PACKAGE_STRING definition to Windows config.h.

llvm-svn: 63539

llvm-svn: 63537

llvm-svn: 63536

llvm-svn: 63533

llvm-svn: 63532

on LP64 hosts.

llvm-svn: 63530

tests.  Thanks for the beautiful reduced testcase Duncan!

llvm-svn: 63529

llvm-svn: 63527

llvm-svn: 63526

llvm-svn: 63523

Made the common case of default address space directive as non-virtual for performance reasons. Provide a single virtual interface for directives of all sizes in  non-default address spaces.

llvm-svn: 63521

and remove trailing whitespace.  No functionality
change.

llvm-svn: 63511

llvm-svn: 63510

llvm-svn: 63509

llvm-svn: 63508

llvm-svn: 63507

llvm-svn: 63506

Teach LowerBRCOND to recognize (xor (setcc x), 1). The xor inverts the condition. It's normally transformed by the dag combiner, unless the condition is set by a arithmetic op with overflow.

llvm-svn: 63505

llvm-svn: 63504

llvm-svn: 63503