interface.

llvm-svn: 22282

llvm-svn: 22276

llvm-svn: 22275

llvm-svn: 22274

See last commit for LangRef, this implements it on all targets.

llvm-svn: 22273

of memory instructions in the assembly, to allow later linking
of traces with LLVM Value*s.

llvm-svn: 22271

llvm-svn: 22270

so this doesn't crash when run.  It is hard to tell if things are right enough to work correctly with all the TmpInstructions running around

llvm-svn: 22261

llvm-svn: 22255

llvm-svn: 22254

GCC 4.0.0 compiler (sometimes incorrectly) warns about under release build.

llvm-svn: 22249

convention? ;)

llvm-svn: 22247

llvm-svn: 22246

llvm-svn: 22245

llvm-svn: 22243

llvm-svn: 22242

llvm-svn: 22241

llvm-svn: 22240

llvm-svn: 22239

llvm-svn: 22238

avoids dereferencing the end() iterator when selecting the fallthrough
block.  This requires an ilist change.

llvm-svn: 22212

not generate unnecessary register copies.  This improves compile time by
2-5% depending on the test.

llvm-svn: 22210

and the target independant register allocator were both using a class named
'LiveRange'.  This lead to the target independant code calling code in the
SparcV9 backend, which crashed.  Fixed by renaming SparcV9's LiveRange to
V9LiveRange.

llvm-svn: 22208

incorrectly using an iterator after it was invalid.

llvm-svn: 22207

llvm-svn: 22203

Undefine the PPC symbol which is defined by Linux/PPC (erroneously) so it
doesn't pollute the user namespace and clash with our namespace declarations.

llvm-svn: 22202

regularly in "normal" code, but for things like software graphics, they
make a big difference.

For the following code:
unsigned short Trans16Bit(unsigned srcA,unsigned srcB,unsigned alpha)
{
	unsigned tmpA,tmpB,mixed;
	tmpA = ((srcA & 0x03E0) << 15) | (srcA & 0x7C1F);
	tmpB = ((srcB & 0x03E0) << 15) | (srcB & 0x7C1F);
	mixed = (tmpA * alpha) + (tmpB * (32 - alpha));
	return ((mixed >> 5) & 0x7C1F) | ((mixed >> 20) & 0x03E0);
}

We now generate:
_Trans16Bit:
.LBB_Trans16Bit_0:      ; entry
        andi. r2, r4, 31775
        rlwimi r2, r4, 15, 7, 11
        subfic r4, r5, 32
        mullw r2, r2, r4
        andi. r4, r3, 31775
        rlwimi r4, r3, 15, 7, 11
        mullw r3, r4, r5
        add r2, r2, r3
        srwi r3, r2, 5
        andi. r3, r3, 31775
        rlwimi r3, r2, 12, 22, 26
        blr

Instead of:
_Trans16Bit:
.LBB_Trans16Bit_0:      ; entry
        slwi r2, r4, 15
        rlwinm r2, r2, 0, 7, 11
        andi. r4, r4, 31775
        or r2, r2, r4
        subfic r4, r5, 32
        mullw r2, r2, r4
        slwi r4, r3, 15
        rlwinm r4, r4, 0, 7, 11
        andi. r3, r3, 31775
        or r3, r4, r3
        mullw r3, r3, r5
        add r2, r2, r3
        srwi r3, r2, 5
        andi. r3, r3, 31775
        srwi r2, r2, 20
        rlwimi r3, r2, 0, 22, 26
        blr

llvm-svn: 22201

llvm-svn: 22200

llvm-svn: 22196

allow marking of loads and stores in the instruction stream with enough information to reconstruct the Value* if it existed

llvm-svn: 22195

llvm-svn: 22194

* Remove warning "control reaches end of non-void function"

llvm-svn: 22193

llvm-svn: 22190

llvm-svn: 22188

llvm-svn: 22187

llvm-svn: 22186

llvm-svn: 22185

llvm-svn: 22179

The issue is there is no unsigned -> double conversion, only signed.  So I
need to test the sign and do a different thing depending on it.  Ideally
this should be in a different BB, but in the mean time, I use a branch
free method.

llvm-svn: 22177

so that the shiny new use of std::cerr is defined.

llvm-svn: 22156