I'll fix the file contents in the next commit.

This pass is currently expanding the COPY and SUBREG_TO_REG pseudos. I
am going to add a hook so targets can expand more pseudo-instructions
after register allocation.

Many targets have pseudo-instructions that assist the register
allocator.  They can be expanded after register allocation, before PEI
and PostRA scheduling.

llvm-svn: 140469

llvm-svn: 140465

Implement Duncan's suggestion to use the result of getSetCCResultType if it is legal
(this is always the case for scalars), otherwise use the promoted result type.

Fix test/CodeGen/X86/vsplit-and.ll when promote-elements is enabled.

llvm-svn: 140464

When generating the trunc-store of i1's, we need to use the vector type and not
the scalar type.

This patch fixes the assertion in CodeGen/Generic/bool-vector.ll when
running with -promote-elements.

llvm-svn: 140463

llvm-svn: 140446

llvm-svn: 140445

llvm-svn: 140443

llvm-svn: 140441

llvm-svn: 140433

No test case. Noticed by inspection and I doubt it ever affects the
outcome of the overall heuristic, let alone final codegen.

llvm-svn: 140431

llvm-svn: 140430

This exposes a -segmented-stacks bug.

llvm-svn: 140429

PR10998: It is not legal to sink an instruction past the terminator of a block; make sure we don't do that.

llvm-svn: 140428

llvm-svn: 140426

Math is hard, and isScaledConstantInRange() always returned false for
negative constants.  It was doing unsigned division of negative numbers
before casting back to signed.

llvm-svn: 140425

llvm-svn: 140423

llvm-svn: 140422

Post-index loads/stores in still need to print the post-indexed immediate, even if it's zero, to distinguish them from non-post-indexed instructions.

llvm-svn: 140420

llvm-svn: 140415

llvm-svn: 140413

llvm-svn: 140412

Add getTreeFactory() to ImmutableSet to allow construction of ImmutableSetRef from an ImmutableSet object.

llvm-svn: 140402

llvm-svn: 140401

llvm-svn: 140397

callee-saved registers and reserved registers.

llvm-svn: 140395

llvm-svn: 140394

patch contributed by Jia Liu!

llvm-svn: 140391

llvm-svn: 140390

llvm-svn: 140387

llvm-svn: 140386

Original patch by Liu.

llvm-svn: 140385

hadd/hsub intrinsics into the new fhadd/fhsub X86 node.

llvm-svn: 140383

Also conducted some reformatting. As the LLVM coding standard doc does not
seem to touch on how to align function arguments, and format code longer than
80 cols in general, the confusion persists. There is the golden rule, but as
this code has gone through several styles to deal with this, the golden rule
seems to be ignored. The latest reformatting effort tries to match the other
source files as much as possible.

Tested on OS X 10.7.1 with, and without the OLD_EXC_SYSTEM defined. Have NOT
tested on LINUX.

llvm-svn: 140379

llvm-svn: 140378

llvm-svn: 140377

From 5936c03172e251f12a0332d1033de5718e6e2091 Mon Sep 17 00:00:00 2001
---
 lib/Target/PTX/PTXInstrInfo.td          |  165 ++++++++++++++++++++----------
 lib/Target/PTX/PTXIntrinsicInstrInfo.td |   88 +++++++++++------
 2 files changed, 167 insertions(+), 86 deletions(-)

llvm-svn: 140376

llvm-svn: 140375

llvm-svn: 140374

DecomposeMERGE_VALUES to "know" that results are legalized in
a particular order, by passing it the number of the result
being legalized (the type legalization core provides this, it
just needs to be passed on).

llvm-svn: 140373

integer-promotion of CONCAT_VECTORS.

Test: test/CodeGen/X86/widen_shuffle-1.ll

This patch fixes the above tests (when running in with -promote-elements).

llvm-svn: 140372