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  1. Jan 30, 2014
  2. Jan 29, 2014
  3. Jan 28, 2014
  4. Jan 27, 2014
    • Matt Arsenault's avatar
      Fix sext(setcc) -> select_cc using wrong type for setcc. · 5f2a92a2
      Matt Arsenault authored
      Also update the comment, since it actually produces a
      select (setcc) instead of select_cc.
      
      It was checking and using the setcc result type for the
      type of the sext, instead of the type of the compared items.
      
      In my problem case, the sext was to i32 and was used as the setcc type,
      but the expected type was i64.
      
      No test since I haven't been able to hit the problem with
      this on any in-tree targets.
      
      llvm-svn: 200249
      5f2a92a2
    • Andrea Di Biagio's avatar
      [DAGCombiner] Teach how to fold sext/aext/zext of constant build vectors. · f09a3577
      Andrea Di Biagio authored
      This patch teaches the DAGCombiner how to fold a sext/aext/zext dag node when
      the operand in input is a build vector of constants (or UNDEFs).
      
      The inability to fold a sext/zext of a constant build_vector was the root
      cause of some pcg bugs affecting vselect expansion on x86-64 with AVX support.
      
      Before this change, the DAGCombiner only knew how to fold a sext/zext/aext of a
      ConstantSDNode.
      
      llvm-svn: 200234
      f09a3577
    • David Majnemer's avatar
      MC: Add support for .cfi_startproc simple · e035cf9c
      David Majnemer authored
      This commit allows LLVM MC to process .cfi_startproc directives when
      they are followed by an additional `simple' identifier. This signals to
      elide the emission of target specific CFI instructions that would
      normally occur initially.
      
      This fixes PR16587.
      
      Differential Revision: http://llvm-reviews.chandlerc.com/D2624
      
      llvm-svn: 200227
      e035cf9c
    • Stepan Dyatkovskiy's avatar
      Fix for PR18102. · 157bb42e
      Stepan Dyatkovskiy authored
      Issue outcomes from DAGCombiner::MergeConsequtiveStores, more precisely from
      mem-ops sequence sorting.
      
      Consider, how MergeConsequtiveStores works for next example:
      
      store i8 1, a[0]
      store i8 2, a[1]
      store i8 3, a[1]   ; a[1] again.
      return   ; DAG starts here
      
      1. Method will collect all the 3 stores.
      2. It sorts them by distance from the base pointer (farthest with highest
      index).
      3. It takes first consecutive non-overlapping stores and (if possible) replaces
      them with a single store instruction.
      
      The point is, we can't determine here which 'store' instruction
      would be the second after sorting ('store 2' or 'store 3').
      It happens that 'store 3' would be the second, and 'store 2' would be the third.
      
      So after merging we have the next result:
      
      store i16 (1 | 3 << 8), base   ; is a[0] but bit-casted to i16
      store i8 2, a[1]
      
      So actually we swapped 'store 3' and 'store 2' and got wrong contents in a[1].
      
      Fix: In sort routine just also take into account mem-op sequence number. 
      llvm-svn: 200201
      157bb42e
  5. Jan 26, 2014
  6. Jan 25, 2014
    • Hal Finkel's avatar
      Disable the use of TBAA when using AA in CodeGen · dbebb52a
      Hal Finkel authored
      There are currently two issues, of which I currently know, that prevent TBAA
      from being correctly usable in CodeGen:
      
        1. Stack coloring does not update TBAA when merging allocas. This is easy
           enough to fix, but is not the largest problem.
      
        2. CGP inserts ptrtoint/inttoptr pairs when sinking address computations.
           Because BasicAA does not handle inttoptr, we'll often miss basic type punning
           idioms that we need to catch so we don't miscompile real-world code (like LLVM).
      
      I don't yet have a small test case for this, but this fixes self hosting a
      non-asserts build of LLVM on PPC64 when using -enable-aa-sched-mi and -misched=shuffle.
      
      llvm-svn: 200093
      dbebb52a
    • Hal Finkel's avatar
      Add combiner-aa-only-func (debug only) · 9b2617a5
      Hal Finkel authored
      This option (which is !NDEBUG only) allows restricting the use of alias
      analysis in DAGCombiner to a specific function. This has proved extremely
      valuable to isolating bugs related to this feature, and mirrors the
      misched-only-func option provided by the new instruction scheduler.
      
      llvm-svn: 200088
      9b2617a5
    • Hal Finkel's avatar
      5fb07341
    • Juergen Ributzka's avatar
      Revert "Revert "Add Constant Hoisting Pass" (r200034)" · f26beda7
      Juergen Ributzka authored
      This reverts commit r200058 and adds the using directive for
      ARMTargetTransformInfo to silence two g++ overload warnings.
      
      llvm-svn: 200062
      f26beda7
    • Hans Wennborg's avatar
      Revert "Add Constant Hoisting Pass" (r200034) · 4d67a2e8
      Hans Wennborg authored
      This commit caused -Woverloaded-virtual warnings. The two new
      TargetTransformInfo::getIntImmCost functions were only added to the superclass,
      and to the X86 subclass. The other targets were not updated, and the
      warning highlighted this by pointing out that e.g. ARMTTI::getIntImmCost was
      hiding the two new getIntImmCost variants.
      
      We could pacify the warning by adding "using TargetTransformInfo::getIntImmCost"
      to the various subclasses, or turning it off, but I suspect that it's wrong to
      leave the functions unimplemnted in those targets. The default implementations
      return TCC_Free, which I don't think is right e.g. for ARM.
      
      llvm-svn: 200058
      4d67a2e8
  7. Jan 24, 2014
    • Juergen Ributzka's avatar
      Add Constant Hoisting Pass · 4f3df4ad
      Juergen Ributzka authored
      Retry commit r200022 with a fix for the build bot errors. Constant expressions
      have (unlike instructions) module scope use lists and therefore may have users
      in different functions. The fix is to simply ignore these out-of-function uses.
      
      llvm-svn: 200034
      4f3df4ad
    • Hal Finkel's avatar
      Fix DAGCombiner::GatherAllAliases to account for non-chain dependencies · 51a98380
      Hal Finkel authored
      DAGCombiner::GatherAllAliases, which is only used when AA used is enabled
      during DAGCombine, had a fundamentally incorrect assumption for which this
      change compensates. GatherAllAliases, which is used to find aliasing
      predecessor chain nodes (so that a better chain can be selected for a load or
      store to enable subsequent optimizations) assumed that walking up the chain
      would always catch all possibly-aliasing loads and stores. This is not true: To
      really find all aliases, we also need to search for aliases through the value
      operand of a store, etc.  Consider the following situation:
      
        Token1 = ...
        L1 = load Token1, %52
        S1 = store Token1, L1, %51
        L2 = load Token1, %52+8
        S2 = store Token1, L2, %51+8
        Token2 = Token(S1, S2)
        L3 = load Token2, %53
        S3 = store Token2, L3, %52
        L4 = load Token2, %53+8
        S4 = store Token2, L4, %52+8
      
      If we search for aliases of S3 (which loads address %52), and we look only
      through the chain, then we'll miss the trivial dependence on L1 (which loads
      from %52). We then might change all loads and stores to use Token1 as their
      chain operand, which could result in copying %53 into %52 before copying
      %52 into %51 (which should happen first).
      
      The problem is, however, that searching for such data dependencies can become
      expensive, and the cost is not directly related to the chain depth. Instead,
      we'll rule out such configurations by insisting that we've visited all chain
      users (except for users of the original chain, which is not necessary).  When
      doing this, we need to look through nodes we don't care about (otherwise,
      things like register copies will interfere with trivial use cases).
      
      Unfortunately, I don't have a small test case for this problem. Creating the
      underlying situation is not hard (a pair of memcpys will do it), but arranging
      for the default instruction schedule to be incorrect is very fragile.
      
      This unbreaks self hosting on PPC64 when using
      -mllvm -combiner-global-alias-analysis -mllvm -combiner-alias-analysis.
      
      llvm-svn: 200033
      51a98380
    • Juergen Ributzka's avatar
      Revert "Add Constant Hoisting Pass" · 50e7e80d
      Juergen Ributzka authored
      This reverts commit r200022 to unbreak the build bots.
      
      llvm-svn: 200024
      50e7e80d
    • Hal Finkel's avatar
      Restrict FindBetterChain DAG combines to unindexed nodes · ccc18e13
      Hal Finkel authored
      These transformations obviously won't work for indexed (pre/post-inc) loads and
      stores. In practice, I'm not sure there is any benefit to enabling them for
      indexed nodes because other transformations that these might enable likely also
      won't handle indexed nodes.
      
      I don't have an in-tree test case that hits this problem, but an upcoming bug
      fix will make it much more likely.
      
      llvm-svn: 200023
      ccc18e13
    • Juergen Ributzka's avatar
      Add Constant Hoisting Pass · 38b67d0c
      Juergen Ributzka authored
      This pass identifies expensive constants to hoist and coalesces them to
      better prepare it for SelectionDAG-based code generation. This works around the
      limitations of the basic-block-at-a-time approach.
      
      First it scans all instructions for integer constants and calculates its
      cost. If the constant can be folded into the instruction (the cost is
      TCC_Free) or the cost is just a simple operation (TCC_BASIC), then we don't
      consider it expensive and leave it alone. This is the default behavior and
      the default implementation of getIntImmCost will always return TCC_Free.
      
      If the cost is more than TCC_BASIC, then the integer constant can't be folded
      into the instruction and it might be beneficial to hoist the constant.
      Similar constants are coalesced to reduce register pressure and
      materialization code.
      
      When a constant is hoisted, it is also hidden behind a bitcast to force it to
      be live-out of the basic block. Otherwise the constant would be just
      duplicated and each basic block would have its own copy in the SelectionDAG.
      The SelectionDAG recognizes such constants as opaque and doesn't perform
      certain transformations on them, which would create a new expensive constant.
      
      This optimization is only applied to integer constants in instructions and
      simple (this means not nested) constant cast experessions. For example:
      %0 = load i64* inttoptr (i64 big_constant to i64*)
      
      Reviewed by Eric
      
      llvm-svn: 200022
      38b67d0c
    • Juergen Ributzka's avatar
      3e752e7a
    • Alp Toker's avatar
      Fix known typos · cb402911
      Alp Toker authored
      Sweep the codebase for common typos. Includes some changes to visible function
      names that were misspelt.
      
      llvm-svn: 200018
      cb402911
    • Rafael Espindola's avatar
      Move emitInlineAsmEnd to the AsmPrinter interface. · 65fd0a8c
      Rafael Espindola authored
      There is no inline asm in a .s file. Therefore, there should be no logic to
      handle it in the streamer. Inline asm only exists in bitcode files, so the
      logic can live in the (long misnamed) AsmPrinter class.
      
      llvm-svn: 200011
      65fd0a8c
    • Eric Christopher's avatar
      Revert "Use DW_AT_high_pc and DW_AT_low_pc for the high and low pc for a" · cf48ade8
      Eric Christopher authored
      in order to fix the cygwin/mingw bots.
      
      This reverts commit r199990.
      
      llvm-svn: 199991
      cf48ade8
    • Eric Christopher's avatar
      Use DW_AT_high_pc and DW_AT_low_pc for the high and low pc for a · c528858c
      Eric Christopher authored
      compile unit. Make these relocations on the platforms that need
      relocations and add a routine to ensure that we don't put the
      addresses in an offset table for split dwarf.
      
      llvm-svn: 199990
      c528858c
    • Rafael Espindola's avatar
      Simplify the logic for deciding when to initialize the sections. · 0e2ccb2d
      Rafael Espindola authored
      llvm-svn: 199971
      0e2ccb2d
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