llvm-svn: 133390

llvm-svn: 133381

top level type without a specified number.  This syntax isn't documented
and blocks forward progress.

llvm-svn: 133371

llvm-svn: 133356

llvm-svn: 133349

In cases such as the attached test, where the case value for a switch
destination is used in a phi node that follows the destination, it
might be better to replace that value with the condition value of the
switch, so that more blocks can be folded away with
TryToSimplifyUncondBranchFromEmptyBlock because there are less
conflicts in the phi node.

llvm-svn: 133344

llvm-svn: 133339

type's bitwidth matches the (allocated) size of the alloca. This severely
pessimizes vector scalar replacement when the only vector type being used is
something like <3 x float> on x86 or ARM whose allocated size matches a
<4 x float>.

I hope to fix some of the flawed assumptions about allocated size throughout
scalar replacement and reenable this in most cases.

llvm-svn: 133338

for pre-2.9 bitcode files.  We keep x86 unaligned loads, movnt, crc32, and the
target indep prefetch change.

As usual, updating the testsuite is a PITA.

llvm-svn: 133337

alloca. Fixes part of <rdar://problem/9580800>.

llvm-svn: 133336

This slightly changes the GPR allocation order on Darwin where R9 is not
a callee-saved register:

Before: %R0 %R1 %R2 %R3 %R12 %R9 %LR %R4 %R5 %R6 %R8 %R10 %R11
After:  %R0 %R1 %R2 %R3 %R9 %R12 %LR %R4 %R5 %R6 %R8 %R10 %R11
llvm-svn: 133326

llvm-svn: 133324

range without a libcall to a new mulo<mode> libcall
that we'd have to create.

Finishes the rest of rdar://9090077 and rdar://9210061

llvm-svn: 133318

the newly created simple type is valid before checking its legality.
Re-commit the test file.

llvm-svn: 133291

Add an alternative rev16 pattern. We should figure out a better way to handle these complex rev patterns. rdar://9609108

llvm-svn: 133289

calls if we haven't been able to lower them any
other way.

Fixes rdar://9090077 and rdar://9210061

llvm-svn: 133288

llvm-svn: 133275

and other backward compatibility hacks.

llvm-svn: 133273

to functions and call/invokes, not to types.

llvm-svn: 133266

llvm-svn: 133260

llvm-svn: 133256

* rounding modes for fp add, mul, sub now use .rn
* float -> int rounding correctly uses .rzi not .rni
* 32bit fdiv for sm13 uses div.rn (instead of div.approx)
* 32bit fdiv for sm10 now uses div (instead of div.approx)

Approx is not IEEE 754 compatible (and should be optionally set by a flag to the backend instead). The .rn rounding modifier is the PTX default anyway, but it's better to be explicit.

All these modifiers should be available by using __fmul_rz functions for example, but support will need to be added for this in the backend.

Patch by Dan Bailey

llvm-svn: 133253

needed since llvm-gcc 3.4 days.

llvm-svn: 133248

remove asmparser support for the old getresult instruction, which has been subsumed by extractvalue.

llvm-svn: 133247

was replaced with return of a "first class aggregate".

llvm-svn: 133245

llvm-svn: 133244

syntax and has been long obsolete.  As usual, updating the tests is the nasty
part of this.

llvm-svn: 133242

are either unreduced or only test old syntax.

llvm-svn: 133228

tail call pseudoinstruction. This fixes <rdar://problem/9624333>.

llvm-svn: 133227

In Thumb mode we cannot handle GPR virtual registers, even though some
instructions can. When isel is lowering a CopyFromReg, it should limit
itself to subclasses of getRegClassFor(VT).

<rdar://problem/9624323>

llvm-svn: 133210

llvm-svn: 133205

Reviewed by chapuni. Sorry for breaking.

llvm-svn: 133200

llvm-svn: 133189

than trying to insert them immediately after the invoke.

llvm-svn: 133188

llvm-svn: 133176

llvm-svn: 133172

names for named metadata nodes.

llvm-svn: 133166

Original patch by Syoyo Fujita with more comments by me.

llvm-svn: 133153

llvm-svn: 133139

llvm-svn: 133134