Don't print out the register number and spill weight, making the TRI
argument unnecessary.

This allows callers to interpret the reg field. It can currently be a
virtual register, a physical register, a spill slot, or a register unit.

llvm-svn: 158031

Instead of computing a live interval per physreg, LiveIntervals can
compute live intervals per register unit. This makes impossible the
confusing situation where aliasing registers could have overlapping live
intervals. It should also make fixed interferernce checking cheaper
since registers have fewer register units than aliases.

Live intervals for regunits are computed on demand, using MRI use-def
chains and the new LiveRangeCalc class. Only regunits live in to ABI
blocks are precomputed during LiveIntervals::runOnMachineFunction().

The regunit liveness computations don't depend on LiveVariables.

llvm-svn: 158029

These LiveRangeCalc methods are to be used when computing a live range
from scratch.

llvm-svn: 158027

Patch by Ivan Llopard.

llvm-svn: 158025

Minimum latency determines per-cycle scheduling groups.
Expected latency determines critical path and cost.

llvm-svn: 158021

llvm-svn: 158020

expression (a * b + c) that can be implemented as a fused multiply-add (fma)
if the target determines that this will be more efficient. This intrinsic
will be used to implement FP_CONTRACT support and an aggressive FMA formation
mode.

If your target has a fast FMA instruction you should override the
isFMAFasterThanMulAndAdd method in TargetLowering to return true.

llvm-svn: 158014

llvm-svn: 158013

llvm-svn: 158007

llvm-svn: 158005

llvm-svn: 158004

IntegersSubsetMapping: added exclude operation, that allows to exclude subset of integers from current mapping.

llvm-svn: 157989

Changed type of Items collection: from std::vector to std::list.
Also some small fixes made in IntegersSubset.h, IntegersSubsetMapping.h and IntegersSubsetTest.cpp.

llvm-svn: 157987

llvm-svn: 157981

llvm-svn: 157980

This allows a subtarget to explicitly specify the issue width and
other properties without providing pipeline stage details for every
instruction.

llvm-svn: 157979

Use ILP heuristics for long latency instrs if no scoreboard exists.

llvm-svn: 157978

valid itinerary but no pipeline stages.

An itinerary can contain useful scheduling information without specifying pipeline stages for each instruction.

llvm-svn: 157977

llvm-svn: 157976

llvm-svn: 157975

Rematerialization is handled by LiveRangeEdit now.

llvm-svn: 157974

It is an old function that does a lot more than required by
CalcSpillWeights, which was the only remaining caller.

The isRematerializable() function never actually sets the isLoad
argument, so don't try to compute that.

llvm-svn: 157973

llvm-svn: 157972

when a compile time constant is known.  This occurs when implicitly zero 
extending function arguments from 16 bits to 32 bits.

<rdar://problem/11481151>

llvm-svn: 157966

llvm-svn: 157963

replacement to make it at least as generic as the instruction being replaced.
This includes:
* dropping nsw/nuw flags
* getting the least restrictive tbaa and fpmath metadata
* merging ranges

Fixes PR12979.

llvm-svn: 157958

No functional change.

llvm-svn: 157957

Remove the same pointers from all the other LiveRangeCalc functions,
simplifying the interface.

llvm-svn: 157941

llvm-svn: 157939

llvm-svn: 157938

inserted after the shift-left-logical node.

llvm-svn: 157937

llvm-svn: 157935

This was mostly done already in r156162, but I missed one place.

llvm-svn: 157929

llvm-svn: 157925

llvm-svn: 157920

llvm-svn: 157917

llvm-svn: 157915

Add VFMADDSUB and VFMSUBADD FMA instructions to folding tables. Also add 213 forms of scalar FMA instructions.

llvm-svn: 157914

llvm-svn: 157912

It seems that this no longer causes test suite failures on PPC64 (after r157159),
and often gives a performance benefit, so it can be enabled by default.

llvm-svn: 157911