llvm-svn: 32034

llvm-svn: 32028

llvm-svn: 32027

llvm-svn: 32026

llvm-svn: 32017

llvm-svn: 32004

xchgl %eax, %edx) to llvm.bswap.i64.  This compiles:

long long test2(long long A) {
  return _OSSwapInt64(A);
}

to:

_test2:
        movl 8(%esp), %eax
        movl 4(%esp), %edx
        bswapl %eax
        bswapl %edx
        ret

instead of:

_test2:
        movl 8(%esp), %edx
        movl 4(%esp), %eax
        bswap   %eax
        bswap   %edx
        xchgl   %eax, %edx
        ret

GCC manages (with -fomit-frame-pointer) the uglier:

_test2:
        subl    $4, %esp
        movl    8(%esp), %eax
        movl    12(%esp), %edx
        bswap   %eax
        bswap   %edx
        xchgl   %eax, %edx
        addl    $4, %esp
        ret

llvm-svn: 32001

JIT on darwin/x86, which has htonl implemented as inline asm.

llvm-svn: 31999

llvm-svn: 31980

llvm-svn: 31976

llvm-svn: 31973

llvm-svn: 31952

of opcode and number of operands.

llvm-svn: 31947

llvm-svn: 31887

features autodetected.  This fixes PR1010 and Regression/CodeGen/X86/xmm-r64.ll
on non-x86-64 hosts.

llvm-svn: 31879

llvm-svn: 31874

clearing the upper 8-bits instead of issuing two instructions. This also
eliminates the need to target the AH register which can be problematic on
x86-64.

llvm-svn: 31832

llvm-svn: 31830

llvm-svn: 31813

Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64.

llvm-svn: 31795

llvm-svn: 31794

llvm-svn: 31790

llvm-svn: 31765

llvm-svn: 31764

llvm-svn: 31754

llvm-svn: 31737

llvm-svn: 31730

llvm-svn: 31712

llvm-svn: 31676

llvm-svn: 31674

llvm-svn: 31650

llvm-svn: 31649

take v4f32 / v2f64 operands and may end up causing larger spills / restores.
Added X86 specific nodes X86ISD::FMAX, X86ISD::FMIN instead.

This fixes PR996.

llvm-svn: 31645

SCALAR_TO_VECTOR, even if the hasOneUse() check pass we may end up folding
the load into two instructions. Make sure we check the SCALAR_TO_VECTOR
has only one use as well.

llvm-svn: 31641

llvm-svn: 31634

llvm-svn: 31633

Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes.

llvm-svn: 31616

This should unbreak csretcc on Linux & mingw targets. Several tests from
llvm-test should be also restored (fftbench, bigfib).

llvm-svn: 31613

llvm-svn: 31583

llvm-svn: 31572