- Apr 06, 2011
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Jim Grosbach authored
llvm-svn: 128959
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Johnny Chen authored
encodings for DisassembleArithMiscFrm(). rdar://problem/9238659 llvm-svn: 128958
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Devang Patel authored
llvm-svn: 128957
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Caroline Tice authored
Add Emulate and DumpEmulation to Instruction class. Move InstructionLLVM out of DisassemblerLLVM class. Add instruction emulation function calls to SBInstruction and SBInstructionList APIs. llvm-svn: 128956
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Chris Lattner authored
llvm-svn: 128955
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Chris Lattner authored
it already is. llvm-svn: 128954
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Bob Wilson authored
llvm-svn: 128953
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Chandler Carruth authored
this class. Clang was warning on this with -Wnon-virtual-dtor. llvm-svn: 128952
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Owen Anderson authored
llvm-svn: 128951
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Fariborz Jahanian authored
As a result, I had to remove a c++ version of a clang test which requires more scrutiny on my part. llvm-svn: 128950
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Johnny Chen authored
Qd -> bit[12] == 0 Qn -> bit[16] == 0 Qm -> bit[0] == 0 If one of these bits is 1, the instruction is UNDEFINED. rdar://problem/9238399 rdar://problem/9238445 llvm-svn: 128949
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Devang Patel authored
llvm-svn: 128948
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Devang Patel authored
llvm-svn: 128947
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Owen Anderson authored
llvm-svn: 128946
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Johnny Chen authored
Added checks for regs which should not be 15. rdar://problem/9237734 llvm-svn: 128945
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Ted Kremenek authored
llvm-svn: 128944
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- Apr 05, 2011
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Chris Lattner authored
still used by RegionInfo :( llvm-svn: 128943
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NAKAMURA Takumi authored
It would be better to browse without stylesheet. (eg. on ViewVC) llvm-svn: 128942
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Johnny Chen authored
For register-controlled shifts, we should check that the encoding constraint Inst{7} = 0 and Inst{4} = 1 is satisfied. rdar://problem/9237693 llvm-svn: 128941
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Owen Anderson authored
Fix bugs in the pseuo-ization of ADCS/SBCS pointed out by Jim, as well as doing the expansion earlier (using a custom inserter) to allow for the chance of predicating these instructions. llvm-svn: 128940
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Greg Clayton authored
consistent and also to lighten up the page a bit. llvm-svn: 128939
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Chris Lattner authored
llvm-svn: 128938
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Fariborz Jahanian authored
targets) when load/store results in multiple instructions. // rdar://8808439 llvm-svn: 128937
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Jakob Stoklund Olesen authored
llvm-svn: 128936
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Jakob Stoklund Olesen authored
llvm-svn: 128935
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Greg Clayton authored
llvm-svn: 128934
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Chris Lattner authored
llvm-svn: 128933
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Chandler Carruth authored
marked explicitly as uninitialized through direct self initialization: int x = x; With r128894 we prevented warnings about this code, and this patch teaches the analysis engine to continue analyzing subsequent uses of 'x'. This should wrap up PR9624. There is still an open question of whether we should suppress the maybe-uninitialized warnings resulting from variables initialized in this fashion. The definitely-uninitialized uses should always be warned. llvm-svn: 128932
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Devang Patel authored
llvm-svn: 128929
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Devang Patel authored
llvm-svn: 128928
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Jakob Stoklund Olesen authored
llvm-svn: 128927
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Bob Wilson authored
of a basic block. llvm-svn: 128925
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Nick Lewycky authored
llvm-svn: 128924
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Roman Divacky authored
llvm-svn: 128923
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Johnny Chen authored
Modify DisassembleCoprocessor() of ARMDisassemblerCore.cpp to react to the change. rdar://problem/9236873 llvm-svn: 128922
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Devang Patel authored
llvm-svn: 128921
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Roman Divacky authored
llvm-svn: 128920
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Jakob Stoklund Olesen authored
llvm-svn: 128919
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Jakob Stoklund Olesen authored
When dead code elimination removes all but one use, try to fold the single def into the remaining use. Rematerialization can leave single-use loads behind that we might as well fold whenever possible. llvm-svn: 128918
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Caroline Tice authored
Convert "process" read/write callback functions to "frame" read/write callback functions. llvm-svn: 128917
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