llvm-svn: 26472

llvm-svn: 26450

llvm-svn: 26448

void foo(float a, int *b) { *b = a; }

to this:

_foo:
        fctiwz f0, f1
        stfiwx f0, 0, r4
        blr

instead of this:

_foo:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        stw r2, 0(r4)
        blr

This implements CodeGen/PowerPC/stfiwx.ll, and also incidentally does the
right thing for GCC bugzilla 26505.

llvm-svn: 26447

llvm-svn: 26445

llvm-svn: 26442

llvm-svn: 26438

llvm-svn: 26435

llvm-svn: 26430

llvm-svn: 26429

but I don't know what other PPC impls do.  If someone could update the proc
table, I would appreciate it :)

llvm-svn: 26421

llvm-svn: 26418

llvm-svn: 26405

llvm-svn: 26403

llvm-svn: 26399

PowerPC/div-2.ll

llvm-svn: 26392

on PowerPC/small-arguments.ll

llvm-svn: 26389

simplify the RHS.  This allows for the elimination of many thousands of
ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2
into this:

_test2:
        srwi r2, r3, 1
        xori r3, r2, 40961
        blr

instead of this:

_test2:
        rlwinm r2, r3, 31, 17, 31
        xori r2, r2, 40961
        rlwinm r3, r2, 0, 16, 31
        blr

llvm-svn: 26388

assertzext produces zero bits.

llvm-svn: 26386

than base).

llvm-svn: 26382

and 2005-05-12-Int64ToFP.

llvm-svn: 26380

* Cleaned up and tweaked LEA cost analysis code. Removed some hacks.
* Handle ADD $X, c to MOV32ri $X+c. These patterns cannot be autogen'd and
  they need to be matched before LEA.

llvm-svn: 26376

llvm-svn: 26375

* Add patterns to handle GlobalAddress, ConstantPool, etc.
  MOV32ri to materialize these nodes in registers.
  ADD32ri to handle %reg + GA, etc.
  MOV32mi to handle store GA, etc. to memory.

llvm-svn: 26374

llvm-svn: 26373

llvm-svn: 26372

llvm-svn: 26371

ADD X, 4
==>
MOV32ri $X+4, ...

llvm-svn: 26366

inline asms! :)

llvm-svn: 26365

llvm-svn: 26348

llvm-svn: 26345

llvm-svn: 26338

  and ExternalSymbol.
- Use C++ code (rather than tblgen'd selection code) to match the above
  mentioned leaf nodes. Do not mutate and nodes and do not record the
  selection in CodeGenMap. These nodes should be safe to duplicate. This is
  a performance win.

llvm-svn: 26335

long long test(long long X) {
  __asm__("foo %0 %L0 %1 %L1" : "=r"(X): "r"(X));
  return X;
}

to:
        foo r2 r3 r2 r3

llvm-svn: 26333

llvm-svn: 26327

llvm-svn: 26326

llvm-svn: 26325

1. Various asm printer bug.
2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper.

llvm-svn: 26324

Suppose base == %eax and it has multiple uses, then instead of
  movl %eax, %ecx
  addl $8, %ecx
use
  leal 8(%eax), %ecx.

llvm-svn: 26323

llvm-svn: 26321