llvm-svn: 189654

Teach X86 backend to create BMI2 BZHI instructions from (and X, (add (shl 1, Y), -1)). Fixes PR17038.

llvm-svn: 189653

This reverts commit r189619.

The commit was breaking the arm_neon_intrinsic test.

llvm-svn: 189648

This removes all expensive pressure tracking logic from the scheduling
critical path of node comparison.

llvm-svn: 189643

Return true for LRGs that end at EarlyClobber or Register slots.

llvm-svn: 189642

Only compare pressure within the same set. When multiple sets are
affected, we prioritize the most constrained set.

llvm-svn: 189641

Created SUPressureDiffs array to hold the per node PDiff computed during DAG building.

Added a getUpwardPressureDelta API that will soon replace the old
one. Compute PressureDelta here from the precomputed PressureDiffs.

Updating for liveness will come next.

llvm-svn: 189640

Mostly trivial patch adding support for compares.  The meat of the
work was added with the branch support.

llvm-svn: 189639

llvm-svn: 189638

This is the next big chunk of fast-isel code.  The primary purpose is
to implement selection of loads and stores, but there is a lot of
drag-along to support this.  The common code to analyze addresses for
both loads and stores is substantial.  It's also necessary to add the
materialization code for global values.

Related to load-store processing is the code to fold loads into
integer extends, since otherwise we generate lots of redundant
instructions.  We also need to add some overrides to some FastEmit
routines to ensure we don't assign GPR 0 to a virtual register when
this would change the meaning of an instruction.

I added handling selection of a few binary arithmetic instructions, to
enable committing some test cases I wrote a while back.

Finally, ap couple of miscellaneous changes:
 * I cleaned up some poor style from a previous patch in
   PPCISelLowering.cpp, pointed out by David Blaikie.
 * I enlarged the Addr.Offset field to avoid sign problems with 32-bit
   offsets. 

llvm-svn: 189636

llvm-svn: 189635

llvm-svn: 189632

any maintained consumers of it on that platform.

llvm-svn: 189631

llvm-svn: 189630

This is a re-commit of r189442; I'll follow up with clang changes.

The previous default was almost, but not quite enough digits to
represent a floating-point value in a manner which preserves the
representation when it's read back in.  The larger default is much
less confusing.

I spent some time looking into printing exactly the right number of
digits if a precision isn't specified, but it's kind of complicated,
and I'm not really sure I understand what APFloat::toString is supposed
to output for FormatPrecision != 0 (or maybe the current API specification
is just silly, not sure which).  I have a WIP patch if anyone is interested.

llvm-svn: 189624

createClassType, createStructType, createUnionType, createEnumerationType,
and createForwardDecl will retain a type when created with a unique identifier,
to make sure they are treated as used even when all uses are replaced with
the identifiers.

Use TrackingVH<MDNode> instead of MDNode in AllRetainTypes, since the created
node can later be updated.

The change will be tested when clients of DIBuilder start to pass in non-empty
unique identifier.

llvm-svn: 189621

In addition to recognizing when the multiply's second argument is
coming from an explicit VDUPLANE, also look for a plain scalar
f32 reference and reference it via the corresponding vector
lane.

rdar://14870054

llvm-svn: 189619

Clean up some usage of Triple.  The base class has methods for determining if the target is iOS and Linux.

llvm-svn: 189604

This should be much more clear now. It's still disabled pending testing.

llvm-svn: 189597

Summary:
Made UnicodeCharSet a class, perform validity checking inside its
constructor instead of each isCharInSet call, use std::binary_search instead of
own implementation.
This patch comes with a necessary change in clang (sent separately).

Reviewers: jordan_rose, klimek

Reviewed By: klimek

CC: cfe-commits, rsmith

Differential Revision: http://llvm-reviews.chandlerc.com/D1534

llvm-svn: 189582

llvm-svn: 189580

Revert unintentional commit (of an unreviewed change).

Original commit message:

Add getUnrollingPreferences to TTI

Allow targets to customize the default behavior of the generic loop unrolling
transformation. This will be used by the PowerPC backend when targeting the A2
core (which is in-order with a deep pipeline), and using more aggressive
defaults is important.

llvm-svn: 189566

Allow targets to customize the default behavior of the generic loop unrolling
transformation. This will be used by the PowerPC backend when targeting the A2
core (which is in-order with a deep pipeline), and using more aggressive
defaults is important.

llvm-svn: 189565

This uses the TargetSubtargetInfo::useAA() function to control the defaults of
the -combiner-alias-analysis and -combiner-global-alias-analysis options.

llvm-svn: 189564

There are several optional (off-by-default) features in CodeGen that can make
use of alias analysis. These features are important for generating code for
some kinds of cores (for example the (in-order) PPC A2 core). This adds a
useAA() function to TargetSubtargetInfo to allow these features to be enabled
by default on a per-subtarget basis.

Here is the first use of this function: To control the default of the
-enable-aa-sched-mi feature.

llvm-svn: 189563

32-bit absolute addressing in instructions likei this:

	mov $_f, %rsi

which is not supported in 64-bit mode.

rdar://8827134

llvm-svn: 189543

Vectorizer/PassManager:  I am working on moving the vectorizer out of the SCC passes. This patch moves the SLP-vectorizer and BB-vectorizer back into SCC passes for two reasons:
1. They are a kind of cannonicalization.
2. The performance measurements show that it is better to keep them in.

There should be no functional change if you are not enabling the LateVectorization mode.

llvm-svn: 189539

llvm-svn: 189527

llvm-svn: 189526

llvm-svn: 189524

llvm-svn: 189513

Code review feedback from Eric Christopher.

llvm-svn: 189512

Re-submitting r189416 with fix for Windows build on where strcasecmp is not defined.

llvm-svn: 189501

When unrolling is disabled in the pass manager, the loop vectorizer should also
not unroll loops. This will allow the -fno-unroll-loops option in Clang to
behave as expected (even for vectorizable loops). The loop vectorizer's
-force-vector-unroll option will (continue to) override the pass-manager
setting (including -force-vector-unroll=0 to force use of the internal
auto-selection logic).

In order to test this, I added a flag to opt (-disable-loop-unrolling) to force
disable unrolling through opt (the analog of -fno-unroll-loops in Clang). Also,
this fixes a small bug in opt where the loop vectorizer was enabled only after
the pass manager populated the queue of passes (the global_alias.ll test needed
a slight update to the RUN line as a result of this fix).

llvm-svn: 189499

with a debug build) with this buggy .indirect_symbol directive usage:

% cat test.s
x: .indirect_symbol _y

The assertion is because it is trying to get the symbol index for the
symbol _y when it is writing out the indirect symbol table. This line of
code in MachObjectWriter::WriteObject() :

        Write32(Asm.getSymbolData(*it->Symbol).getIndex());

And while there is a symbol _y it does not have any getSymbolData set which
is only done in MachObjectWriter::BindIndirectSymbols() for pointer sections
or stub sections.  I added a check and an error in there to catch this in case
something slips through.

But to get a better error the parser should detect when a .indirect_symbol
directive is used and it is not in a pointer section or stub section.  To make
that work I moved the handling of the indirect symbol out of the target
independent AsmParser code into the DarwinAsmParser code that can check
for the proper Mach-O section types.

rdar://14825505

llvm-svn: 189497

With the added debug assertions this fix is covered by existing Clang
tests. (& found some other issues, also fixed)

llvm-svn: 189495

Fix a few things in one swoop.

# Add some negative tests.
# Fix some formatting issues.
# Add some missing IsThumb / ARMv8
# Fix some outs / ins mistakes.

llvm-svn: 189490

The usual default of "dmb ish" (inner-shareable) isn't even a valid instruction
on v6M or v7M (well, it does the same thing but software is strongly
discouraged from using it) so we should emit a full-system barrier there.

llvm-svn: 189483

llvm-svn: 189482

Clang is now generating cleaner IR, so this removes the old variants which
should be completely unused.

llvm-svn: 189481