Commits · f9ab416d7066d75ae1e42c706687926840454726 · Roger Ferrer / llvm-epi-0.8 · GitLab

This is an archived project. Repository and other project resources are read-only.

Feb 27, 2016
- AMDGPU: Split vi-insts subtarget feature · 9d82ee75
  Matt Arsenault authored Feb 27, 2016
  9d82ee75
- AMDGPU: Add s_sleep intrinsic · 274d34e7
  Matt Arsenault authored Feb 27, 2016
  274d34e7
- AMDGPU: Implement readcyclecounter · 61738cbc
  Matt Arsenault authored Feb 27, 2016
  61738cbc
- CodeGen: Take MachineInstr& in SlotIndexes and LiveIntervals, NFC · 3ac9cc61
  Duncan P. N. Exon Smith authored Feb 27, 2016
  3ac9cc61
Feb 26, 2016
- [AMDGPU] Assembler: Basic support for MIMG · 2f684f13
  Nikolay Haustov authored Feb 26, 2016
  2f684f13
Feb 25, 2016
- [AMDGPU] Disassembler: Support for all VOP1 instructions. · 161a158e
  Nikolay Haustov authored Feb 25, 2016
  161a158e
- [AMDGPU] Assembler: Simplify handling of optional operands · 2e4c7297
  Nikolay Haustov authored Feb 25, 2016
  2e4c7297
- Revert r261742, "[AMDGPU] Assembler: Simplify handling of optional operands" · 3d3d0f41
  NAKAMURA Takumi authored Feb 25, 2016
  3d3d0f41
Feb 24, 2016
- [AMDGPU] Assembler: Simplify handling of optional operands · 4f073ca7
  Nikolay Haustov authored Feb 24, 2016
  4f073ca7
- [AMDGPU] fix amd_kernel_code_t bit field position as per spec (added missing reserved fields) · 3c728e43
  Nikolay Haustov authored Feb 24, 2016
  3c728e43
- AMDGPU: Check cheaper condition before SignBitIsZero · cd09961f
  Matt Arsenault authored Feb 24, 2016
  cd09961f
Feb 23, 2016
- [AMDGPU] Fix operands of S_BFE_U64 and S_BFM_B64 · 2a62b3c2
  Nikolay Haustov authored Feb 23, 2016
  2a62b3c2
- CodeGen: TII: Take MachineInstr& in predicate API, NFC · 6307eb55
  Duncan P. N. Exon Smith authored Feb 23, 2016
  6307eb55
Feb 22, 2016
- CodeGen: Bring back MachineBasicBlock::iterator::getInstrIterator()... · d84f6006
  Duncan P. N. Exon Smith authored Feb 22, 2016
  d84f6006
- AMDGPU/R600: Implement allowsMisalignedMemoryAccess · fa67bdbd
  Matt Arsenault authored Feb 22, 2016
  fa67bdbd
- Revert "CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC" · c5b668de
  Duncan P. N. Exon Smith authored Feb 22, 2016
  c5b668de
- [AMDGPU][llvm-mc] Support for 32-bit inline literals · d93a34f7
  Tom Stellard authored Feb 22, 2016
  d93a34f7
- [AMDGPU] [llvm-mc] [VI] Fix encoding of LDS/GDS instructions. · 82fc153b
  Tom Stellard authored Feb 22, 2016
  82fc153b
Feb 21, 2016
- CodeGen: MachineInstr::getIterator() => getInstrIterator(), NFC · dc0848c0
  Duncan P. N. Exon Smith authored Feb 21, 2016
  dc0848c0
Feb 20, 2016
- AMDGPU/SI: Use v_readfirstlane to legalize SMRD with VGPR base pointer · 467b5b90
  Tom Stellard authored Feb 20, 2016
  467b5b90
Feb 19, 2016
- AMDGPU/SI: Fix s_waitcnt insertion for flat instructions · 2d26fe7a
  Tom Stellard authored Feb 19, 2016
  2d26fe7a
Feb 18, 2016
- AMDGPU/SI: add llvm.amdgcn.image.load/store[.mip] intrinsics · f2c64db5
  Nicolai Haehnle authored Feb 18, 2016
  f2c64db5
- Test commit access. · 10813a4e
  Nikolay Haustov authored Feb 18, 2016
  10813a4e
- [AMDGPU] Disassembler: Added basic disassembler for AMDGPU target · e1818af8
  Tom Stellard authored Feb 18, 2016
  e1818af8
Feb 16, 2016
- [AMDGPU] Rename $dst operand to $vdst for VOP instructions. · cc4c8718
  Tom Stellard authored Feb 16, 2016
  cc4c8718
Feb 13, 2016
- AMDGPU: Prepare for reducing private element size. · f2ddbf00
  Matt Arsenault authored Feb 13, 2016
  f2ddbf00
- AMDGPU/SI: Add llvm.amdgcn.mov.dpp intrinsic · 4409051d
  Tom Stellard authored Feb 13, 2016
  4409051d
- AMDGPU: Cleanup includes and random macros · d2759212
  Matt Arsenault authored Feb 13, 2016
  d2759212
- AMDGPU: Add intrinsics for sin/cos · ce56a0ef
  Matt Arsenault authored Feb 13, 2016
  ce56a0ef
- AMDGPU: Rename intrinsic to better match instruction name · 79963e80
  Matt Arsenault authored Feb 13, 2016
  79963e80
- AMDGPU/SI: Add instruction defs for VOP1 DPP instructions · 60705164
  Tom Stellard authored Feb 13, 2016
  60705164
- AMDGPU: Fix broken condition causing warning · 16f48d7c
  Matt Arsenault authored Feb 13, 2016
  16f48d7c
- AMDGPU/SI: Detect uniform branches and emit s_cbranch instructions · bc4497b1
  Tom Stellard authored Feb 12, 2016
  bc4497b1
Feb 12, 2016
- [AMDGPU] Assembler: Swap operands of flat_store instructions to match AMD assembler · 46937ca4
  Tom Stellard authored Feb 12, 2016
  46937ca4
- AMDGPU/SI: Annotate Loops with Constant Condition in SIAnnotateControlFlow pass. · e07f1aa8
  Changpeng Fang authored Feb 12, 2016
  e07f1aa8
- Fix uninitialized memory read. · ac5e36f5
  Benjamin Kramer authored Feb 12, 2016
  ac5e36f5
- AMDGPU: Set flat_scratch from flat_scratch_init reg · 296b8491
  Matt Arsenault authored Feb 12, 2016
  296b8491
- AMDGPU: Set element_size in private resource descriptor · 24ee0785
  Matt Arsenault authored Feb 12, 2016
  24ee0785
- AMDGPU: Fix mishandling alignment when scalarizing vector loads/stores · 16f7bcb6
  Matt Arsenault authored Feb 12, 2016
  16f7bcb6
- AMDGPU: Initialize SILowerControlFlow · 55d49cfe
  Matt Arsenault authored Feb 12, 2016
  55d49cfe