No functionality change.

llvm-svn: 152927

These edges are not really necessary, but it is consistent with the
way we currently create physreg edges. Scheduler heuristics that
expect a DAG edge to the block terminator could benefit from this
change. Although in the future I hope we have a better mechanism for
modeling latency across scheduling regions.

llvm-svn: 152895

on our internal nightly testers.  So, basically revert r152486 again.

Abbreviated original commit message:
Implement a more intelligent way of spilling uses across an invoke boundary.

It looks as if Chander's inlining work, r152737, exposed an issue.

llvm-svn: 152887

Revert r152613 (and r152614), "Inline the d'tor and add an anchor instead." for workaround of g++-4.4's miscompilation.

It caused MSP430DAGToDAGISel::SelectIndexedBinOp() to be miscompiled.
When two ReplaceUses()'s are expanded as inline, vtable in base class is stored to latter (ISelUpdater)ISU.

llvm-svn: 152877

the DECL information.

rdar://10855921

llvm-svn: 152876

Part of rdar://8905263

llvm-svn: 152845

llvm-svn: 152844

llvm-svn: 152843

llvm-svn: 152842

llvm-svn: 152841

When optimizing certain BUILD_VECTOR nodes into other BUILD_VECTOR nodes, add the new node into the work list because there is a potential for further optimizations.

llvm-svn: 152784

out the DW_AT_name. Older gdbs unfortunately still use it to
disambiguate member functions in templated classes (gdb.cp/templates.exp).

rdar://11043421 (which is now deferred for a bit)

llvm-svn: 152782

Transform:

        (fsub x, (fadd x, y)) -> (fneg y) and
        (fsub x, (fadd y, x)) -> (fneg y)

if 'unsafe math' is specified.
<rdar://problem/7540295>

llvm-svn: 152777

llvm-svn: 152711

There were cases where a value could be used and it's both crossing an invoke
and NOT crossing an invoke. This could happen in the landing pads. In that case,
we will demote the value to the stack like we did before.
<rdar://problem/10609139>

llvm-svn: 152705

expensive "getFirstTerminator" call. This reduces the time of compilation in
PR12258 from >10 minutes to < 10 seconds.

llvm-svn: 152704

New flags: -misched-topdown, -misched-bottomup. They can be used with
the default scheduler or with -misched=shuffle. Without either
topdown/bottomup flag -misched=shuffle now alternates scheduling
direction.

LiveIntervals update is unimplemented with bottom-up scheduling, so
only -misched-topdown currently works.

Capped the ScheduleDAG hierarchy with a concrete ScheduleDAGMI class.
ScheduleDAGMI is aware of the top and bottom of the unscheduled zone
within the current region. Scheduling policy can be plugged into
the ScheduleDAGMI driver by implementing MachineSchedStrategy.
ConvergingScheduler is now the default scheduling algorithm.
It exercises the new driver but still does no reordering.

llvm-svn: 152700

llvm-svn: 152699

output (we're emitting a specification already and the information
isn't changing).

Saves 1% on the debug information for a build of llvm.

Fixes rdar://11043421

llvm-svn: 152697

Fortify r152675 a bit. Although I'm not able to come up with a test case that would trigger the truncation case.

llvm-svn: 152678

(i16 load $addr+c*sizeof(i16)) and replace uses of (i32 vextract) with the
i16 load. It should issue an extload instead: (i32 extload $addr+c*sizeof(i16)).

rdar://11035895

llvm-svn: 152675

No functionality change.

llvm-svn: 152658

llvm-svn: 152614

llvm-svn: 152613

No functionality change.

llvm-svn: 152611

llvm-svn: 152610

--- Reverse-merging r152486 into '.':
U    lib/CodeGen/SjLjEHPrepare.cpp

llvm-svn: 152571

DwarfDebug: Store the filename/dirname pair as a zero-separated string in a stringmap, instead of using a highly inefficient std::map of a pair of std::strings.

llvm-svn: 152541

Renamed methods caseBegin, caseEnd and caseDefault with case_begin, case_end, and case_default.
Added some notes relative to case iterators.

llvm-svn: 152532

llvm-svn: 152492

The old way of determine when and where to spill a value that was used inside of
a landing pad resulted in spilling that value everywhere and not just at the
invoke edge.

This algorithm determines which values are used within a landing pad. It then
spills those values before the invoke and reloads them before the uses. This
should prevent excessive spilling in many cases, e.g. inside of loops.
<rdar://problem/10609139>

llvm-svn: 152486

llvm-svn: 152460

Somehow we never verified SSA dominance before.

llvm-svn: 152458

llvm-svn: 152457

llvm-svn: 152454

All uses of a virtual register must be dominated by its def.

llvm-svn: 152449

And add comments, since this is obviously confusing.

llvm-svn: 152445

llvm-svn: 152393

llvm-svn: 152382

llvm-svn: 152374